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From: Ian Rogers <irogers@google.com>
To: Adrian Hunter <adrian.hunter@intel.com>,
	 Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	 Arnaldo Carvalho de Melo <acme@kernel.org>,
	Benjamin Gray <bgray@linux.ibm.com>,
	 Caleb Biggers <caleb.biggers@intel.com>,
	Edward Baker <edward.baker@intel.com>,
	 Ian Rogers <irogers@google.com>, Ingo Molnar <mingo@redhat.com>,
	 James Clark <james.clark@linaro.org>,
	Jing Zhang <renyu.zj@linux.alibaba.com>,
	 Jiri Olsa <jolsa@kernel.org>,
	John Garry <john.g.garry@oracle.com>, Leo Yan <leo.yan@arm.com>,
	 Namhyung Kim <namhyung@kernel.org>,
	Perry Taylor <perry.taylor@intel.com>,
	 Peter Zijlstra <peterz@infradead.org>,
	Samantha Alt <samantha.alt@intel.com>,
	 Sandipan Das <sandipan.das@amd.com>,
	Thomas Falcon <thomas.falcon@intel.com>,
	 Weilin Wang <weilin.wang@intel.com>, Xu Yang <xu.yang_2@nxp.com>,
	linux-kernel@vger.kernel.org,  linux-perf-users@vger.kernel.org
Subject: [PATCH v10 23/35] perf jevents: Add ILP metrics for Intel
Date: Thu,  8 Jan 2026 11:10:53 -0800	[thread overview]
Message-ID: <20260108191105.695131-24-irogers@google.com> (raw)
In-Reply-To: <20260108191105.695131-1-irogers@google.com>

Use the counter mask (cmask) to see how many cycles an instruction
takes to retire. Present as a set of ILP metrics.

Tested-by: Thomas Falcon <thomas.falcon@intel.com>
Signed-off-by: Ian Rogers <irogers@google.com>
---
 tools/perf/pmu-events/intel_metrics.py | 40 ++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/tools/perf/pmu-events/intel_metrics.py b/tools/perf/pmu-events/intel_metrics.py
index 19a284b4c520..bc3c50285916 100755
--- a/tools/perf/pmu-events/intel_metrics.py
+++ b/tools/perf/pmu-events/intel_metrics.py
@@ -263,6 +263,45 @@ def IntelBr():
                        description="breakdown of retired branch instructions")
 
 
+def IntelIlp() -> MetricGroup:
+    tsc = Event("msr/tsc/")
+    c0 = Event("msr/mperf/")
+    low = tsc - c0
+    inst_ret = Event("INST_RETIRED.ANY_P")
+    inst_ret_c = [Event(f"{inst_ret.name}/cmask={x}/") for x in range(1, 6)]
+    core_cycles = Event("CPU_CLK_UNHALTED.THREAD_P_ANY",
+                        "CPU_CLK_UNHALTED.DISTRIBUTED",
+                        "cycles")
+    ilp = [d_ratio(max(inst_ret_c[x] - inst_ret_c[x + 1], 0), core_cycles)
+           for x in range(0, 4)]
+    ilp.append(d_ratio(inst_ret_c[4], core_cycles))
+    ilp0 = 1
+    for x in ilp:
+        ilp0 -= x
+    return MetricGroup("lpm_ilp", [
+        Metric("lpm_ilp_idle", "Lower power cycles as a percentage of all cycles",
+               d_ratio(low, tsc), "100%"),
+        Metric("lpm_ilp_inst_ret_0",
+               "Instructions retired in 0 cycles as a percentage of all cycles",
+               ilp0, "100%"),
+        Metric("lpm_ilp_inst_ret_1",
+               "Instructions retired in 1 cycles as a percentage of all cycles",
+               ilp[0], "100%"),
+        Metric("lpm_ilp_inst_ret_2",
+               "Instructions retired in 2 cycles as a percentage of all cycles",
+               ilp[1], "100%"),
+        Metric("lpm_ilp_inst_ret_3",
+               "Instructions retired in 3 cycles as a percentage of all cycles",
+               ilp[2], "100%"),
+        Metric("lpm_ilp_inst_ret_4",
+               "Instructions retired in 4 cycles as a percentage of all cycles",
+               ilp[3], "100%"),
+        Metric("lpm_ilp_inst_ret_5",
+               "Instructions retired in 5 or more cycles as a percentage of all cycles",
+               ilp[4], "100%"),
+    ])
+
+
 def IntelL2() -> Optional[MetricGroup]:
     try:
         DC_HIT = Event("L2_RQSTS.DEMAND_DATA_RD_HIT")
@@ -639,6 +678,7 @@ def main() -> None:
         Smi(),
         Tsx(),
         IntelBr(),
+        IntelIlp(),
         IntelL2(),
         IntelLdSt(),
         IntelPorts(),
-- 
2.52.0.457.g6b5491de43-goog


  parent reply	other threads:[~2026-01-08 19:12 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-08 19:10 [PATCH v10 00/35] AMD and Intel metric generation with Python Ian Rogers
2026-01-08 19:10 ` [PATCH v10 01/35] perf jevents: Build support for generating metrics from python Ian Rogers
2026-01-08 19:10 ` [PATCH v10 02/35] perf jevents: Add load event json to verify and allow fallbacks Ian Rogers
2026-01-08 19:10 ` [PATCH v10 03/35] perf jevents: Add RAPL event metric for AMD zen models Ian Rogers
2026-01-08 19:10 ` [PATCH v10 04/35] perf jevents: Add idle " Ian Rogers
2026-01-08 19:10 ` [PATCH v10 05/35] perf jevents: Add upc metric for uops per cycle for AMD Ian Rogers
2026-01-08 19:10 ` [PATCH v10 06/35] perf jevents: Add br metric group for branch statistics on AMD Ian Rogers
2026-01-08 19:10 ` [PATCH v10 07/35] perf jevents: Add itlb metric group for AMD Ian Rogers
2026-01-08 19:10 ` [PATCH v10 08/35] perf jevents: Add dtlb " Ian Rogers
2026-01-08 19:10 ` [PATCH v10 09/35] perf jevents: Add uncore l3 " Ian Rogers
2026-01-08 19:10 ` [PATCH v10 10/35] perf jevents: Add load store breakdown metrics ldst " Ian Rogers
2026-01-08 19:10 ` [PATCH v10 11/35] perf jevents: Add context switch metrics " Ian Rogers
2026-01-08 19:10 ` [PATCH v10 12/35] perf jevents: Add RAPL metrics for all Intel models Ian Rogers
2026-01-08 19:10 ` [PATCH v10 13/35] perf jevents: Add idle metric for " Ian Rogers
2026-01-08 19:10 ` [PATCH v10 14/35] perf jevents: Add CheckPmu to see if a PMU is in loaded json events Ian Rogers
2026-01-08 19:10 ` [PATCH v10 15/35] perf jevents: Add smi metric group for Intel models Ian Rogers
2026-01-08 19:10 ` [PATCH v10 16/35] perf jevents: Mark metrics with experimental events as experimental Ian Rogers
2026-01-08 19:10 ` [PATCH v10 17/35] perf jevents: Add tsx metric group for Intel models Ian Rogers
2026-01-08 19:10 ` [PATCH v10 18/35] perf jevents: Add br metric group for branch statistics on Intel Ian Rogers
2026-01-08 19:10 ` [PATCH v10 19/35] perf jevents: Add software prefetch (swpf) metric group for Intel Ian Rogers
2026-01-08 19:10 ` [PATCH v10 20/35] perf jevents: Add ports metric group giving utilization on Intel Ian Rogers
2026-01-08 19:10 ` [PATCH v10 21/35] perf jevents: Add L2 metrics for Intel Ian Rogers
2026-01-08 19:10 ` [PATCH v10 22/35] perf jevents: Add load store breakdown metrics ldst " Ian Rogers
2026-01-08 19:10 ` Ian Rogers [this message]
2026-01-08 19:10 ` [PATCH v10 24/35] perf jevents: Add context switch metrics " Ian Rogers
2026-01-08 19:10 ` [PATCH v10 25/35] perf jevents: Add FPU " Ian Rogers
2026-01-08 19:10 ` [PATCH v10 26/35] perf jevents: Add Miss Level Parallelism (MLP) metric " Ian Rogers
2026-01-08 19:10 ` [PATCH v10 27/35] perf jevents: Add mem_bw " Ian Rogers
2026-01-08 19:10 ` [PATCH v10 28/35] perf jevents: Add local/remote "mem" breakdown metrics " Ian Rogers
2026-01-08 19:10 ` [PATCH v10 29/35] perf jevents: Add dir " Ian Rogers
2026-01-08 19:11 ` [PATCH v10 30/35] perf jevents: Add C-State metrics from the PCU PMU " Ian Rogers
2026-01-08 19:11 ` [PATCH v10 31/35] perf jevents: Add local/remote miss latency metrics " Ian Rogers
2026-01-08 19:11 ` [PATCH v10 32/35] perf jevents: Add upi_bw metric " Ian Rogers
2026-01-08 19:11 ` [PATCH v10 33/35] perf jevents: Add mesh bandwidth saturation " Ian Rogers
2026-01-08 19:11 ` [PATCH v10 34/35] perf jevents: Add cycles breakdown metric for arm64/AMD/Intel Ian Rogers
2026-01-08 19:11 ` [PATCH v10 35/35] perf jevents: Validate that all names given an Event Ian Rogers
2026-01-20  5:23 ` [PATCH v10 00/35] AMD and Intel metric generation with Python Ian Rogers
2026-01-23 17:12   ` Ian Rogers
2026-01-27 17:07 ` Arnaldo Carvalho de Melo
2026-01-27 18:09   ` Ian Rogers

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