Re: [Patch v2 1/4] perf/x86/intel: Clear stale ACR mask before updating new mask

Mi, Dapeng
2026-04-22T00:57:27Z

On 4/22/2026 6:29 AM, Andi Kleen wrote:
>> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
>> index 4768236c054b..774ae9a4eeaf 100644
>> --- a/arch/x86/events/intel/core.c
>> +++ b/arch/x86/events/intel/core.c
>> @@ -3334,6 +3334,12 @@ static void intel_pmu_acr_late_setup(struct cpu_hw_events *cpuc)
>> struct perf_event *event, *leader;
>> int i, j, idx;
>>
>> + /* Clear stale ACR mask first. */
>> + for (i = 0; i < cpuc->n_events; i++) {
>> + event = cpuc->event_list[i];
>> + event->hw.config1 = 0;
>> + }
> Are you sure nothing else could be using config1?
>
> In principle ACR events can be used with some config1 setting.

Yes, the field "hw.config1" is introduced for support auto counter reload,
it's only used to store the ACR counter indices. Thanks.

https://lore.kernel.org/all/20250327195217.2683619-6-kan.liang@linux.intel.com/

>
>
> -Andi