From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 78A2531A56C; Thu, 14 May 2026 16:21:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778775700; cv=none; b=PgPpXXyPV1UlDRyyID3ppSYm9IrGjJ6UQWlDTjU8GPK5oZ4YkmlU9vOIGKEf2w1RBPzN0o0n+d/q2WuWyKFLlF2FlY9I4IaWFI4zQp5Sbc4JvOZsAe0ix5dQOvJjZUbOW4p8Cz4bIDWwXsYJOJj0iHd+onqXCYKRtHVop6nFAiA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778775700; c=relaxed/simple; bh=LsQsJ/EIJPt7FY3mXN8jMzUaXSyiTsmkWcJOpGnE2jE=; h=From:Subject:Date:Message-Id:MIME-Version:Content-Type:To:Cc; b=GkbTOxqwXXlXPHvYb5xTfPVLyL3zMiMNnDGVKlsFNaXYgV29zdt2yO9dY7k7VkqFXSYGSFDfJGWs+WWVxUgzL9DTqXB1ob19BS586Kp3L4sG2g5NSRQktVurQdYqL4UzXsT/w4gliTGFUE1jrtnC1bEt3o6z7GLBbCOpzjY4UVo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=Nj42+w90; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="Nj42+w90" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 072061C00; Thu, 14 May 2026 09:21:27 -0700 (PDT) Received: from e132581.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C14D23F7B4; Thu, 14 May 2026 09:21:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778775692; bh=LsQsJ/EIJPt7FY3mXN8jMzUaXSyiTsmkWcJOpGnE2jE=; h=From:Subject:Date:To:Cc:From; b=Nj42+w90Gv/mZ2EZW7D4BGV2plN+C43bkbm2vdIARnboyv/tRIs2MgWRvWt1aGomX q0bhS91sXh4sC0fXDt4opqe+zRr6envXlM9FUhY7fRLeV3+Q7iE9/c/KRffEFT1bLZ kCbGzK7xs8wDrdQoMWAkFhNUm4vJFx2lpjl8sYqg= From: Leo Yan Subject: [PATCH v2 0/2] perf: Improve refresh limit in overflow handler Date: Thu, 14 May 2026 17:21:18 +0100 Message-Id: <20260514-arm_cs_clean_perf_handle-v2-0-cbb29c3b3661@arm.com> Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAH72BWoC/42Nyw6CMBREf4V0bU0flIor/8OQplxupQkU0hqiI fy7hY074/JM5sysJGH0mMi1WEnExSc/hQziVBDobXgg9V1mIpioWClqauNoIBkY0AYzY3Qm17o Bqa4kgJQ1cKdI1ueIzr+O6XuTuffpOcX38bTwPf1jdOGUU9lKW+uStRclbrl6hmncHw5dcfFTZ 1Qr56SWCJ346s22bR8ts3Qn/QAAAA== X-Change-ID: 20260429-arm_cs_clean_perf_handle-763cc339c1f5 To: Peter Zijlstra , Ingo Molnar , Shuah Khan , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , James Clark , Sumanth Korikkar Cc: linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-perf-users@vger.kernel.org, Leo Yan X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1778775688; l=1909; i=leo.yan@arm.com; s=20250604; h=from:subject:message-id; bh=LsQsJ/EIJPt7FY3mXN8jMzUaXSyiTsmkWcJOpGnE2jE=; b=B45+evgH66eG83X0urrgbmODxywo+FX5TCK1EFKKWilLExQc+ai184j+gXen28WZ7DYAuLn4Z PpytBsAHvxkBbjxFOfqI/OHO9YTWptXs1gdYg111sZu5GMJZf3NC7Kc X-Developer-Key: i=leo.yan@arm.com; a=ed25519; pk=k4BaDbvkCXzBFA7Nw184KHGP5thju8lKqJYIrOWxDhI= Commit 18dbcbfabfff ("perf: Fix the POLL_HUP delivery breakage") added a direct pmu->stop() call when the refresh limit reaches zero. The change was based on a test program [1] that reported missing POLL_HUP notifications. However, the test program used SIGIO, which is a standard signal and can be coalesced. As a result, userspace may miss signal delivery even though the signal was generated by the kernel. This is expected behaviour for standard signals. This series adds a selftest for the PERF_EVENT_IOC_REFRESH limit using a real-time signal, which guarantees queued signal delivery and confirms that POLL_HUP notifications are delivered reliably on arm64. The second patch replaces the direct PMU stop with an explicit pending-disable guard, this can avoid redundant stop for most cases and logic is easier to understand. [1] https://lore.kernel.org/lkml/aICYAqM5EQUlTqtX@li-2b55cdcc-350b-11b2-a85c-a78bff51fc11.ibm.com/ Signed-off-by: Leo Yan --- Changes in v2: - Replaced ASSERT_EQ() with EXPECT_EQ() in test tear down (Sashiko). - Handled a race case for high frequency overflow before disable irq_work (Sashiko). - Link to v1: https://lore.kernel.org/r/20260512-arm_cs_clean_perf_handle-v1-0-75ff373ecd22@arm.com --- Leo Yan (2): selftests/perf_events: Add test for refresh limit signals perf/core: Ignore overflows while disable is pending kernel/events/core.c | 8 +- tools/testing/selftests/perf_events/.gitignore | 1 + tools/testing/selftests/perf_events/Makefile | 3 +- .../testing/selftests/perf_events/refresh_signal.c | 120 +++++++++++++++++++++ 4 files changed, 130 insertions(+), 2 deletions(-) --- base-commit: e1914add2799225a87502051415fc5c32aeb02ae change-id: 20260429-arm_cs_clean_perf_handle-763cc339c1f5 Best regards, -- Leo Yan