Re: [Patch v4 3/8] perf/x86/intel: Fallback to sw branch type decoding if no hw decoding

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Forcing `X86_BR_TYPE_SAVE` on Arch LBR CPUs without hardware branch-type support causes massive NMI overhead due to an unconditional fallback to software decoding.
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commit f25e57aa8ef5b59fd749c6fcb24f34aa7668326f
Author: Dapeng Mi <dapeng1.mi@linux.intel.com>

perf/x86/intel: Fallback to sw branch type decoding if no hw decoding

This commit updates the arch-LBR filtering to fall back to software
branch-type decoding when the hardware feature is unavailable. This ensures
branch classification works correctly across different arch-LBR
configurations.

> diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c
> index 72f2adcda7c68..e2657f791e507 100644
> --- a/arch/x86/events/intel/lbr.c
> +++ b/arch/x86/events/intel/lbr.c
> @@ -1231,7 +1231,7 @@ intel_pmu_lbr_filter(struct cpu_hw_events *cpuc)
>  		 * Doesn't support OTHER_BRANCH decoding for now.
>  		 * OTHER_BRANCH branch type still rely on software decoding.
>  		 */
> -		if (static_cpu_has(X86_FEATURE_ARCH_LBR) &&
> +		if (static_branch_likely(&x86_lbr_type) &&

[Severity: High]
Does this change unintentionally cause a massive performance regression on
systems without hardware branch-type support?

In intel_pmu_setup_hw_lbr_filter(), X86_BR_TYPE_SAVE is always forced
for all Arch LBR CPUs:

arch/x86/events/intel/lbr.c:intel_pmu_setup_hw_lbr_filter() {
    ...
    if (static_cpu_has(X86_FEATURE_ARCH_LBR)) {
        reg->config = mask;
        ...
        reg->reg |= X86_BR_TYPE_SAVE;
        return 0;
    }
}

Because X86_BR_TYPE_SAVE is forced, the fast-path early exit in
intel_pmu_lbr_filter() is never taken:

arch/x86/events/intel/lbr.c:intel_pmu_lbr_filter() {
    ...
    if (((br_sel & X86_BR_ALL) == X86_BR_ALL) &&
        ((br_sel & X86_BR_TYPE_SAVE) != X86_BR_TYPE_SAVE))
        return;
    ...
}

With the fallback introduced by this patch, won't every sampled branch be
forced to undergo high-overhead software disassembly in the NMI context, even
when the user requested no specific branch type filtering?

Should intel_pmu_setup_hw_lbr_filter() be updated to conditionally force
X86_BR_TYPE_SAVE only if x86_lbr_type is actually enabled?

>  		    type <= ARCH_LBR_BR_TYPE_KNOWN_MAX) {
>  			to_plm = kernel_ip(to) ? X86_BR_KERNEL : X86_BR_USER;
>  			type = arch_lbr_br_type_map[type] | to_plm;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260616044654.3468742-1-dapeng1.mi@linux.intel.com?part=3