Re: [PATCH 3/3] perf/x86/amd/uncore: Add Hygon uncore PMU support

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Inconsistency between sysfs format attribute and event mask for unknown/future models (> 0x18) in the DF IOD PMU.
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commit 7e45f23af16ead4a16cb506a64d18f3c1ad13f46
Author: Qi Liu <liuqi@hygon.cn>

perf/x86/amd/uncore: Add Hygon uncore PMU support

Add uncore PMU support for Hygon processors based on the
shared AMD-family uncore framework.

> diff --git a/arch/x86/events/amd/hygon_uncore.c b/arch/x86/events/amd/hygon_uncore.c
> new file mode 100644
> index 0000000000000..7758a1dda21ae
> --- /dev/null
> +++ b/arch/x86/events/amd/hygon_uncore.c

[ ... ]

> +static u64 hygon_uncore_df_event_mask(void)
> +{
> +	if (boot_cpu_data.x86_model == 0x4 ||
> +	    boot_cpu_data.x86_model == 0x5)
> +		return HYGON_F18H_M4H_RAW_EVENT_MASK_DF;
> +
> +	if (boot_cpu_data.x86_model >= 0x6 &&
> +	    boot_cpu_data.x86_model <= 0x18)
> +		return HYGON_F18H_M6H_RAW_EVENT_MASK_DF;
> +
> +	return HYGON_F18H_RAW_EVENT_MASK_DF;
> +}

[ ... ]

> +static struct attribute *hygon_uncore_df_iod_format_attr[] = {
> +	&format_attr_event.attr,
> +	&format_attr_umask10.attr,
> +	&format_attr_constid.attr,
> +	&format_attr_iod.attr,
> +	NULL,
> +};

[ ... ]

> +static int hygon_uncore_df_iod_ctx_init(struct uncore_common *uncore,
> +					unsigned int cpu)
> +{

[ ... ]

> +	pmu->msr_base = MSR_HYGON_F18H_DF_IOD_CTL;
> +	pmu->rdpmc_base = -1;
> +	pmu->group = uncore_common_ctx_gid(uncore, cpu);
> +	pmu->private = uncore;
> +
> +	if (boot_cpu_data.x86_model >= 0x6 &&
> +	    boot_cpu_data.x86_model <= 0x18)
> +		hygon_uncore_df_iod_format_attr[1] = &format_attr_umask12.attr;

[Severity: Medium]
For unknown or future CPU models (where x86_model > 0x18), this initialization
leaves the DF IOD format attribute as the default 10-bit umask
(format_attr_umask10.attr).

However, hygon_uncore_df_event_mask() above falls back to returning the 8-bit
mask HYGON_F18H_RAW_EVENT_MASK_DF for these models.

Will this inconsistency cause userspace to believe a 10-bit umask is supported
via sysfs, while the PMU driver silently truncates the top 2 bits when applying
the hardware mask in hygon_uncore_df_event_init()?

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Sashiko AI review · https://sashiko.dev/#/patchset/20260701034413.718872-1-liuqi@hygon.cn?part=3