[PATCH v3 0/3] perf/cxlpmu: Misc updates

[Davidlohr Bueso <dave@stgolabs.net>]

Hello,

Changes from v2 (https://lore.kernel.org/all/20260630235002.253297-1-dave@stgolabs.net/):
 - Split the 64-bit HDM filter write fix into its own patch 1. (Richard).
 - Allow CRB filtering for the Queue Occupancy, Queue Residency and
   Retry event groups, not just DDR Interface in patch 3 (Richard).
 - Reject CRB filtering when counting multiple events (multiple
   mask bits set), undefined behavior in patch 3.
 - Reordered the series so the events patch comes first, providing
   the event group ID definitions the filter validation needs.
 - Add the RD/WR merged queue occupancy and power down events,
   and the Throttle Events group in patch 2.

Three patches for the CXL PMU driver.

Patch 1 is a standalone fix.

Patch 2 adds the CXL 4.0 events that hardware exposes but the
driver did not. It now precedes the filter work as the latter
refers to the new event group IDs.

Patch 3 implements Channel/Rank/Bank (CRB) filtering, now permitted
for all event groups that CXL 4.0 Table 13-5 allows Filter ID 1 on.

v2 was tested on real hardware. The v3 changes have additionally
been exercised under qemu CPMU emulation (jic23 tree) + changes for
the new events/Filter=1.

Thanks!

Davidlohr Bueso (1):
  perf/cxlpmu: Fix 64-bit write to 32-bit HDM filter register

Harshal Thakkar (2):
  perf/cxlpmu: Add missing CXL 4.0 events
  perf/cxlpmu: Support Channel/Rank/Bank filter

 drivers/perf/cxl_pmu.c | 115 +++++++++++++++++++++++++++++++++++++++--
 1 file changed, 112 insertions(+), 3 deletions(-)

-- 
2.39.5