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From: sashiko-bot@kernel.org
To: "Thomas Falcon" <thomas.falcon@intel.com>
Cc: linux-perf-users@vger.kernel.org
Subject: Re: [PATCH v2 3/6] perf tools: Show memory region in perf-c2c subcommand
Date: Tue, 14 Jul 2026 00:56:18 +0000	[thread overview]
Message-ID: <20260714005619.36BAD1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260714004359.179451-4-thomas.falcon@intel.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Arbitrary upper bound on UAPI memory region ID breaks forward compatibility for future memory tiering topologies.
--

--- Patch [3]: [PATCH v2 3/6] perf tools: Show memory region in perf-c2c subcommand ---
commit 06c5065732519d0c60d1739bb8a421f9120486b9
Author: Dapeng Mi <dapeng1.mi@linux.intel.com>

perf tools: Show memory region in perf-c2c subcommand

This commit adds a memory region field to the cacheline list view in
perf-c2c. The new field helps identify the memory region to which the
cacheline belongs.

Link: https://lore.kernel.org/all/20260114011750.350569-1-dapeng1.mi@linux.intel.com/

> diff --git a/tools/perf/builtin-c2c.c b/tools/perf/builtin-c2c.c
> index c9584dbedf77a..cba2e9f21ae7c 100644
> --- a/tools/perf/builtin-c2c.c
> +++ b/tools/perf/builtin-c2c.c

[ ... ]

> @@ -281,6 +282,18 @@ static void c2c_he__set_node(struct c2c_hist_entry *c2c_he,
>  	}
>  }
>  
> +static void c2c_he__set_mem_region(struct c2c_hist_entry *c2c_he,
> +				   unsigned int mem_region)
> +{
> +	if (WARN_ONCE(mem_region > PERF_MEM_REGION_MEM7,
> +		      "WARNING: invalid memory region ID\n"))
> +		return;

[Severity: Medium]
Does this arbitrary upper bound break forward compatibility for future memory
tiering topologies?

The UAPI field provides 5 bits, allowing for memory region IDs up to 31. By
rejecting regions greater than PERF_MEM_REGION_MEM7, valid region IDs from
future kernels or hardware architectures will be dropped and displayed as
"N/A", while also triggering a spurious warning.

It looks like the new display logic in dcacheline_node_mem_region() can
already mathematically scale to handle these higher values gracefully.

> +
> +	/* Update mem_region only if it really accesses memory */
> +	if (mem_region >= PERF_MEM_REGION_MMIO)
> +		c2c_he->mem_region = mem_region;
> +}
> +

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260714004359.179451-1-thomas.falcon@intel.com?part=3

  reply	other threads:[~2026-07-14  0:56 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-14  0:43 [PATCH v2 0/6] perf: Add support for memory region/range reporting Thomas Falcon
2026-07-14  0:43 ` [PATCH v2 1/6] perf mem: Fix size tracking for mem_lvl's in perf_script__meminfo_scnprintf() Thomas Falcon
2026-07-14  0:51   ` sashiko-bot
2026-07-14  0:43 ` [PATCH v2 2/6] perf mem: Add support for printing PERF_MEM_LVLNUM_L0 Thomas Falcon
2026-07-14  0:43 ` [PATCH v2 3/6] perf tools: Show memory region in perf-c2c subcommand Thomas Falcon
2026-07-14  0:56   ` sashiko-bot [this message]
2026-07-14  0:43 ` [PATCH v2 4/6] perf tools: Show memory region in perf-script subcommand Thomas Falcon
2026-07-14  0:59   ` sashiko-bot
2026-07-14  0:43 ` [PATCH v2 5/6] perf header: Support memory ranges Thomas Falcon
2026-07-14  0:43 ` [PATCH v2 6/6] perf c2c: print memory region data with stdio output Thomas Falcon
2026-07-14  0:57   ` sashiko-bot

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