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From: sashiko-bot@kernel.org
To: "Dapeng Mi" <dapeng1.mi@linux.intel.com>
Cc: linux-perf-users@vger.kernel.org
Subject: Re: [Patch v10 03/10] tools headers: Sync x86 headers with kernel sources
Date: Tue, 21 Jul 2026 07:39:46 +0000	[thread overview]
Message-ID: <20260721073947.713061F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260721072707.3787848-4-dapeng1.mi@linux.intel.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Header synchronization mismatch: tools/arch/x86/include/asm/msr-index.h introduces macros not present in the core kernel header.
--

--- Patch [3]: [Patch v10 03/10] tools headers: Sync x86 headers with kernel sources ---
commit a80378c4387abdba00fb87b0094f51fec90aa452
Author: Dapeng Mi <dapeng1.mi@linux.intel.com>

tools headers: Sync x86 headers with kernel sources

This commit adds ARCH_PEBS_VECR_xxx macros to the tools version of the x86
msr-index.h header to sync with the main kernel sources.

> diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
> index eff29645719bc..8cbc4c4997065 100644
> --- a/tools/arch/x86/include/asm/msr-index.h
> +++ b/tools/arch/x86/include/asm/msr-index.h
> @@ -350,6 +350,13 @@
>  #define ARCH_PEBS_LBR_SHIFT		40
>  #define ARCH_PEBS_LBR			(0x3ull << ARCH_PEBS_LBR_SHIFT)
>  #define ARCH_PEBS_VECR_XMM		BIT_ULL(49)
> +#define ARCH_PEBS_VECR_YMMH		BIT_ULL(50)
> +#define ARCH_PEBS_VECR_EGPRS		BIT_ULL(51)
> +#define ARCH_PEBS_VECR_OPMASK		BIT_ULL(53)
> +#define ARCH_PEBS_VECR_ZMMH		BIT_ULL(54)
> +#define ARCH_PEBS_VECR_H16ZMM		BIT_ULL(55)
> +#define ARCH_PEBS_VECR_EXT_SHIFT	49
> +#define ARCH_PEBS_VECR_EXT		(0x7full << ARCH_PEBS_VECR_EXT_SHIFT)

[Severity: Medium]
The commit message states "Sync newly introduced ARCH_PEBS_VECR_xxx macros
from kernel". Are these macros actually present in the main kernel tree?

Looking at the core kernel version of arch/x86/include/asm/msr-index.h, these
definitions do not appear to exist.

If they are missing from the main kernel header, won't this cause a
divergence between the tools header and the core kernel header, resulting
in warnings from tools/perf/check-headers.sh during the perf build?

>  #define ARCH_PEBS_GPR			BIT_ULL(61)
>  #define ARCH_PEBS_AUX			BIT_ULL(62)
>  #define ARCH_PEBS_EN			BIT_ULL(63)

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260721072707.3787848-1-dapeng1.mi@linux.intel.com?part=3

  reply	other threads:[~2026-07-21  7:39 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-21  7:26 [Patch v10 00/10] Perf tools: Support eGPRs/SSP/SIMD registers sampling Dapeng Mi
2026-07-21  7:26 ` [Patch v10 01/10] perf dwarf-regs: Fix DWARF register index bounds check Dapeng Mi
2026-07-21  7:26 ` [Patch v10 02/10] perf util: Add missed fields in _attr__fprintf() and __attr_swap() Dapeng Mi
2026-07-21  7:27 ` [Patch v10 03/10] tools headers: Sync x86 headers with kernel sources Dapeng Mi
2026-07-21  7:39   ` sashiko-bot [this message]
2026-07-21  7:27 ` [Patch v10 04/10] perf headers: Sync perf_event.h/perf_regs.h with the kernel headers Dapeng Mi
2026-07-21  7:47   ` sashiko-bot
2026-07-21  7:27 ` [Patch v10 05/10] perf regs: Support x86 eGPRs/SSP sampling Dapeng Mi
2026-07-21  7:52   ` sashiko-bot
2026-07-21  7:27 ` [Patch v10 06/10] perf regs: Support x86 SIMD registers sampling Dapeng Mi
2026-07-21  7:50   ` sashiko-bot
2026-07-21  7:27 ` [Patch v10 07/10] perf regs: Enable dumping of SIMD registers Dapeng Mi
2026-07-21  7:27 ` [Patch v10 08/10] perf dwarf-regs: Add SIMD/eGPRs support for x86 DWARF registers Dapeng Mi
2026-07-21  7:27 ` [Patch v10 09/10] perf tests: Add x86 eGPRs/SSP registers sampling test Dapeng Mi
2026-07-21  7:42   ` sashiko-bot
2026-07-21  7:27 ` [Patch v10 10/10] perf tests: Add SIMD " Dapeng Mi
2026-07-21  7:48   ` sashiko-bot

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