Re: [PATCH v5 07/26] perf dwarf-regs: Adapt get_dwarf_regnum() for arm64

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Missing 'lr' (link register) support in arm64 DWARF register programmatic lookup.
--

commit 5d023c42589d9bd9061d9468194dc470f5cdc273
Author: Tengda Wu <wutengda@huaweicloud.com>

perf dwarf-regs: Adapt get_dwarf_regnum() for arm64

This commit replaces the static table lookup for arm64 DWARF registers with a
programmatic parser in __get_dwarf_regnum_arm64(). This allows resolving
arm64 register names directly into their corresponding DWARF register numbers
for perf annotate.

> diff --git a/tools/perf/util/dwarf-regs-arch/dwarf-regs-arm64.c b/tools/perf/util/dwarf-regs-arch/dwarf-regs-arm64.c
> index 593ca7d4fccca..720c863d18696 100644
> --- a/tools/perf/util/dwarf-regs-arch/dwarf-regs-arm64.c
> +++ b/tools/perf/util/dwarf-regs-arch/dwarf-regs-arm64.c

[ ... ]

> @@ -10,3 +13,22 @@ int __get_dwarf_regnum_for_perf_regnum_arm64(int perf_regnum)
>  
>  	return perf_regnum;
>  }
> +
> +int __get_dwarf_regnum_arm64(const char *name)
> +{
> +	int reg;
> +
> +	if (!strcmp(name, "sp"))
> +		return 31;
> +
> +	if (*name != 'x' && *name != 'w')
> +		return -ENOENT;

[Severity: Medium]
Does this code inadvertently drop support for the link register ('lr')?

If perf annotate processes an instruction containing 'lr' (e.g.,
stp x29, lr, [sp, #-16]!), arch__dwarf_regnum() extracts "lr" and calls
this programmatic logic. Since "lr" does not start with 'x' or 'w' and is not
"sp", it will return -ENOENT. This seems like it will prevent data type
tracking for the link register, which was previously supported when mapping
to DWARF register 30.

> +
> +	name++;
> +	if (!isdigit(*name))
> +		return -ENOENT;
> +
> +	reg = strtol(name, NULL, 10);
> +
> +	return reg >= 0 && reg <= 30 ? reg : -ENOENT;
> +}

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Sashiko AI review · https://sashiko.dev/#/patchset/cover.1788872630.git.wutengda@huaweicloud.com?part=7