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Sat, 14 Nov 2026 15:37:30 -0800 (PST) Received: from ryzen.lan ([2601:644:8000:37f::e34]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-8bed2d0f473sm2306372b3a.53.2026.11.14.15.37.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Nov 2026 15:37:28 -0800 (PST) From: Rosen Penev To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Thomas Bogendoerfer , Thomas Gleixner Cc: Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , James Clark , Radu Rendec , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org Subject: [PATCH v2 2/4] irqchip/ath79-misc: map the performance counter interrupt on demand Date: Sat, 14 Nov 2026 15:37:16 -0800 Message-ID: <20261114233718.86520-3-rosenp@gmail.com> X-Mailer: git-send-email 2.56.1 In-Reply-To: <20261114233718.86520-1-rosenp@gmail.com> References: <20261114233718.86520-1-rosenp@gmail.com> X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The MIPS perf code now asks for the counter overflow interrupt when the first event is created, instead of from an early_initcall. Create the mapping in get_c0_perfcount_int() then, instead of when the controller is initialized, so that the controller no longer has to be ready before the early initcalls. Signed-off-by: Rosen Penev --- drivers/irqchip/irq-ath79-misc.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/irqchip/irq-ath79-misc.c b/drivers/irqchip/irq-ath79-misc.c index 258b8e9a2d57..5cedea5234e0 100644 --- a/drivers/irqchip/irq-ath79-misc.c +++ b/drivers/irqchip/irq-ath79-misc.c @@ -23,11 +23,19 @@ #define ATH79_MISC_IRQ_COUNT 32 #define ATH79_MISC_PERF_IRQ 5 -static int ath79_perfcount_irq; +static struct irq_domain *ath79_misc_domain; +/* Called by the MIPS perf code when the first event is created. */ int get_c0_perfcount_int(void) { - return ath79_perfcount_irq; + unsigned int irq; + + if (!ath79_misc_domain) + return -1; + + irq = irq_create_mapping(ath79_misc_domain, ATH79_MISC_PERF_IRQ); + + return irq ? irq : -1; } EXPORT_SYMBOL_GPL(get_c0_perfcount_int); @@ -121,8 +129,6 @@ static void __init ath79_misc_intc_domain_init( { void __iomem *base = domain->host_data; - ath79_perfcount_irq = irq_create_mapping(domain, ATH79_MISC_PERF_IRQ); - /* Disable and clear all interrupts */ __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE); __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS); @@ -157,6 +163,7 @@ static int __init ath79_misc_intc_of_init( } ath79_misc_intc_domain_init(domain, irq); + ath79_misc_domain = domain; return 0; } -- 2.56.1