From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Jiri Olsa <jolsa@kernel.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Andi Kleen <ak@linux.intel.com>,
Eranian Stephane <eranian@google.com>,
Mark Rutland <mark.rutland@arm.com>,
broonie@kernel.org, Ravi Bangoria <ravi.bangoria@amd.com>,
linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
Zide Chen <zide.chen@intel.com>,
Falcon Thomas <thomas.falcon@intel.com>,
Dapeng Mi <dapeng1.mi@intel.com>,
Xudong Hao <xudong.hao@intel.com>,
Kan Liang <kan.liang@linux.intel.com>
Subject: Re: [Patch v5 07/19] perf: Add sampling support for SIMD registers
Date: Mon, 8 Dec 2025 13:24:47 +0800 [thread overview]
Message-ID: <288614cf-d22f-4329-8440-5a3ab7299041@linux.intel.com> (raw)
In-Reply-To: <20251205110706.GT2528459@noisy.programming.kicks-ass.net>
On 12/5/2025 7:07 PM, Peter Zijlstra wrote:
> On Wed, Dec 03, 2025 at 02:54:48PM +0800, Dapeng Mi wrote:
>
>> @@ -545,6 +547,25 @@ struct perf_event_attr {
>> __u64 sig_data;
>>
>> __u64 config3; /* extension of config2 */
>> +
>> +
>> + /*
>> + * Defines set of SIMD registers to dump on samples.
>> + * The sample_simd_regs_enabled !=0 implies the
>> + * set of SIMD registers is used to config all SIMD registers.
>> + * If !sample_simd_regs_enabled, sample_regs_XXX may be used to
>> + * config some SIMD registers on X86.
>> + */
>> + union {
>> + __u16 sample_simd_regs_enabled;
>> + __u16 sample_simd_pred_reg_qwords;
>> + };
>> + __u32 sample_simd_pred_reg_intr;
>> + __u32 sample_simd_pred_reg_user;
>> + __u16 sample_simd_vec_reg_qwords;
>> + __u64 sample_simd_vec_reg_intr;
>> + __u64 sample_simd_vec_reg_user;
>> + __u32 __reserved_4;
>> };
> This is poorly aligned and causes holes.
>
> This:
>
> diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
> index d292f96bc06f..2deb8dd0ca37 100644
> --- a/include/uapi/linux/perf_event.h
> +++ b/include/uapi/linux/perf_event.h
> @@ -545,6 +545,14 @@ struct perf_event_attr {
> __u64 sig_data;
>
> __u64 config3; /* extension of config2 */
> +
> + __u16 sample_simd_pred_reg_qwords;
> + __u32 sample_simd_pred_reg_intr;
> + __u32 sample_simd_pred_reg_user;
> + __u16 sample_simd_vec_reg_qwords;
> + __u64 sample_simd_vec_reg_intr;
> + __u64 sample_simd_vec_reg_user;
> + __u32 __reserved_4;
> };
>
> /*
>
> results in:
>
> __u64 config3; /* 128 8 */
> __u16 sample_simd_pred_reg_qwords; /* 136 2 */
>
> /* XXX 2 bytes hole, try to pack */
>
> __u32 sample_simd_pred_reg_intr; /* 140 4 */
> __u32 sample_simd_pred_reg_user; /* 144 4 */
> __u16 sample_simd_vec_reg_qwords; /* 148 2 */
>
> /* XXX 2 bytes hole, try to pack */
>
> __u64 sample_simd_vec_reg_intr; /* 152 8 */
> __u64 sample_simd_vec_reg_user; /* 160 8 */
> __u32 __reserved_4; /* 168 4 */
>
>
>
> A better layout might be:
>
> diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
> index d292f96bc06f..f72707e9df68 100644
> --- a/include/uapi/linux/perf_event.h
> +++ b/include/uapi/linux/perf_event.h
> @@ -545,6 +545,15 @@ struct perf_event_attr {
> __u64 sig_data;
>
> __u64 config3; /* extension of config2 */
> +
> + __u16 sample_simd_pred_reg_qwords;
> + __u16 sample_simd_vec_reg_qwords;
> + __u32 __reserved_4;
> +
> + __u32 sample_simd_pred_reg_intr;
> + __u32 sample_simd_pred_reg_user;
> + __u64 sample_simd_vec_reg_intr;
> + __u64 sample_simd_vec_reg_user;
> };
>
> /*
>
> such that:
>
> __u64 config3; /* 128 8 */
> __u16 sample_simd_pred_reg_qwords; /* 136 2 */
> __u16 sample_simd_vec_reg_qwords; /* 138 2 */
> __u32 __reserved_4; /* 140 4 */
> __u32 sample_simd_pred_reg_intr; /* 144 4 */
> __u32 sample_simd_pred_reg_user; /* 148 4 */
> __u64 sample_simd_vec_reg_intr; /* 152 8 */
> __u64 sample_simd_vec_reg_user; /* 160 8 */
>
Sure. Thanks.
>
next prev parent reply other threads:[~2025-12-08 5:24 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-03 6:54 [Patch v5 00/19] Support SIMD/eGPRs/SSP registers sampling for perf Dapeng Mi
2025-12-03 6:54 ` [Patch v5 01/19] perf: Eliminate duplicate arch-specific functions definations Dapeng Mi
2025-12-03 6:54 ` [Patch v5 02/19] perf/x86: Use x86_perf_regs in the x86 nmi handler Dapeng Mi
2025-12-03 6:54 ` [Patch v5 03/19] perf/x86: Introduce x86-specific x86_pmu_setup_regs_data() Dapeng Mi
2025-12-03 6:54 ` [Patch v5 04/19] x86/fpu/xstate: Add xsaves_nmi() helper Dapeng Mi
2025-12-03 6:54 ` [Patch v5 05/19] perf: Move and rename has_extended_regs() for ARCH-specific use Dapeng Mi
2025-12-03 6:54 ` [Patch v5 06/19] perf/x86: Add support for XMM registers in non-PEBS and REGS_USER Dapeng Mi
2025-12-04 15:17 ` Peter Zijlstra
2025-12-04 15:47 ` Peter Zijlstra
2025-12-05 6:37 ` Mi, Dapeng
2025-12-04 18:59 ` Dave Hansen
2025-12-05 8:42 ` Peter Zijlstra
2025-12-03 6:54 ` [Patch v5 07/19] perf: Add sampling support for SIMD registers Dapeng Mi
2025-12-05 11:07 ` Peter Zijlstra
2025-12-08 5:24 ` Mi, Dapeng [this message]
2025-12-05 11:40 ` Peter Zijlstra
2025-12-08 6:00 ` Mi, Dapeng
2025-12-03 6:54 ` [Patch v5 08/19] perf/x86: Enable XMM sampling using sample_simd_vec_reg_* fields Dapeng Mi
2025-12-05 11:25 ` Peter Zijlstra
2025-12-08 6:10 ` Mi, Dapeng
2025-12-03 6:54 ` [Patch v5 09/19] perf/x86: Enable YMM " Dapeng Mi
2025-12-03 6:54 ` [Patch v5 10/19] perf/x86: Enable ZMM " Dapeng Mi
2025-12-03 6:54 ` [Patch v5 11/19] perf/x86: Enable OPMASK sampling using sample_simd_pred_reg_* fields Dapeng Mi
2025-12-03 6:54 ` [Patch v5 12/19] perf/x86: Enable eGPRs sampling using sample_regs_* fields Dapeng Mi
2025-12-05 12:16 ` Peter Zijlstra
2025-12-08 6:11 ` Mi, Dapeng
2025-12-03 6:54 ` [Patch v5 13/19] perf/x86: Enable SSP " Dapeng Mi
2025-12-05 12:20 ` Peter Zijlstra
2025-12-08 6:21 ` Mi, Dapeng
2025-12-03 6:54 ` [Patch v5 14/19] perf/x86/intel: Enable PERF_PMU_CAP_SIMD_REGS capability Dapeng Mi
2025-12-03 6:54 ` [Patch v5 15/19] perf/x86/intel: Enable arch-PEBS based SIMD/eGPRs/SSP sampling Dapeng Mi
2025-12-03 6:54 ` [Patch v5 16/19] perf/x86: Activate back-to-back NMI detection for arch-PEBS induced NMIs Dapeng Mi
2025-12-05 12:39 ` Peter Zijlstra
2025-12-07 20:44 ` Andi Kleen
2025-12-08 6:46 ` Mi, Dapeng
2025-12-08 8:50 ` Peter Zijlstra
2025-12-08 8:53 ` Mi, Dapeng
2025-12-03 6:54 ` [Patch v5 17/19] perf headers: Sync with the kernel headers Dapeng Mi
2025-12-03 23:43 ` Ian Rogers
2025-12-04 1:37 ` Mi, Dapeng
2025-12-04 7:28 ` Ian Rogers
2025-12-03 6:54 ` [Patch v5 18/19] perf parse-regs: Support new SIMD sampling format Dapeng Mi
2025-12-04 0:17 ` Ian Rogers
2025-12-04 2:58 ` Mi, Dapeng
2025-12-04 7:49 ` Ian Rogers
2025-12-04 9:20 ` Mi, Dapeng
2025-12-04 16:16 ` Ian Rogers
2025-12-05 4:00 ` Mi, Dapeng
2025-12-05 6:38 ` Ian Rogers
2025-12-05 8:10 ` Mi, Dapeng
2025-12-05 16:35 ` Ian Rogers
2025-12-08 4:20 ` Mi, Dapeng
2025-12-03 6:55 ` [Patch v5 19/19] perf regs: Enable dumping of SIMD registers Dapeng Mi
2025-12-04 0:24 ` [Patch v5 00/19] Support SIMD/eGPRs/SSP registers sampling for perf Ian Rogers
2025-12-04 3:28 ` Mi, Dapeng
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