From: Ravi Bangoria <ravi.bangoria@amd.com>
To: Peter Zijlstra <peterz@infradead.org>,
Ondrej Mosnacek <omosnace@redhat.com>
Cc: Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@kernel.org>, "Ian Rogers" <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
"James Clark" <james.clark@linaro.org>,
<linux-perf-users@vger.kernel.org>, <selinux@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
Ravi Bangoria <ravi.bangoria@amd.com>
Subject: Re: [PATCH v2] perf test amd ibs: avoid using executable heap
Date: Wed, 1 Jul 2026 22:29:04 +0530 [thread overview]
Message-ID: <43dd9d9f-2348-43c0-8af5-77ef260c64a3@amd.com> (raw)
In-Reply-To: <20260701064301.GH48970@noisy.programming.kicks-ass.net>
Hi Peter, Ondrej,
>> permission under SELinux (things like JIT or regex compilation need it
>> as well). mmap() with MAP_ANONYMOUS will give us a zeroed mapping that
>> begins on a page boundary, so the result is equivalent to the original
>> code even without a memset() or the page-alignment dance.
>
> I would argue that having RWX is a problem, you really want RW->RO->RX
> transitions, so even with mmap() you want to combine with mprotect().
My original intent for using RWX was to generate sufficient Icache miss
samples for the IBS Fetch unit by overwriting the code prior to execution.
I am wondering whether it would be possible to achieve the same result
by using CLFLUSH with RX permissions. Something like below (build tested
only).
--- a/tools/perf/arch/x86/tests/amd-ibs-period.c
+++ b/tools/perf/arch/x86/tests/amd-ibs-period.c
@@ -25,6 +25,7 @@ static int page_size;
#define PERF_MMAP_TOTAL_PAGES (PERF_MMAP_DATA_PAGES + 1)
#define PERF_MMAP_TOTAL_SIZE (PERF_MMAP_TOTAL_PAGES * page_size)
+#define mb() asm volatile("mfence":::"memory")
#define rmb() asm volatile("lfence":::"memory")
enum {
@@ -41,10 +42,16 @@ struct perf_pmu *fetch_pmu;
struct perf_pmu *op_pmu;
unsigned int perf_event_max_sample_rate;
+static inline void clflush(const volatile void *p)
+{
+ asm volatile("clflush (%0)" :: "r"(p) : "memory");
+}
+
/* Dummy workload to generate IBS samples. */
static int dummy_workload_1(unsigned long count)
{
- int (*func)(void);
+ int (*func1)(void);
+ int (*func2)(void);
int ret = 0;
char *p;
char insn1[] = {
@@ -59,33 +66,42 @@ static int dummy_workload_1(unsigned long count)
0xcc, /* int 3 */
};
- p = calloc(2, page_size);
- if (!p) {
- printf("malloc() failed. %m");
+
+ p = mmap(NULL, page_size, PROT_READ | PROT_WRITE,
+ MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+ if (p == MAP_FAILED) {
+ printf("mmap() failed. %m");
return 1;
}
- func = (void *)((unsigned long)(p + page_size - 1) & ~(page_size - 1));
+ memcpy(p, insn1, sizeof(insn1));
+ memcpy(p + 128, insn2, sizeof(insn2));
- ret = mprotect(func, page_size, PROT_READ | PROT_WRITE | PROT_EXEC);
+ ret = mprotect(p, page_size, PROT_READ | PROT_EXEC);
if (ret) {
printf("mprotect() failed. %m");
goto out;
}
+ func1 = (void *)(p);
+ func2 = (void *)(p + 128);
+
if (count < 100000)
count = 100000;
else if (count > 10000000)
count = 10000000;
while (count--) {
- memcpy((void *)func, insn1, sizeof(insn1));
- if (func() != 1) {
+ clflush(func1);
+ mb();
+ if (func1() != 1) {
pr_debug("ERROR insn1\n");
ret = -1;
goto out;
}
- memcpy((void *)func, insn2, sizeof(insn2));
- if (func() != 2) {
+
+ clflush(func2);
+ mb();
+ if (func2() != 2) {
pr_debug("ERROR insn2\n");
ret = -1;
goto out;
@@ -93,7 +109,7 @@ static int dummy_workload_1(unsigned long count)
}
out:
- free(p);
+ munmap(p, page_size);
return ret;
}
---
Thanks,
Ravi
next prev parent reply other threads:[~2026-07-01 16:59 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 6:23 [PATCH v2] perf test amd ibs: avoid using executable heap Ondrej Mosnacek
2026-07-01 6:33 ` sashiko-bot
2026-07-01 6:43 ` Peter Zijlstra
2026-07-01 16:59 ` Ravi Bangoria [this message]
2026-07-01 18:54 ` Ian Rogers
2026-07-02 10:17 ` Peter Zijlstra
2026-07-02 11:11 ` Ravi Bangoria
2026-07-02 11:12 ` Ravi Bangoria
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