linux-perf-users.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* Load latency sampling on Sandy Bridge
@ 2014-10-29  8:07 Manuel Selva
  2014-10-29 16:09 ` Vince Weaver
  0 siblings, 1 reply; 9+ messages in thread
From: Manuel Selva @ 2014-10-29  8:07 UTC (permalink / raw)
  To: linux-perf-users@vger.kernel.org

Hi,

I am trying to setup load latency sampling on a Sandy Bridge processor 
(Cpu familly 6, model 42, model name  Intel(R) Core(TM) i5-2520M CPU @ 
2.50GHz) running a 3.13 linux kernel.

After deep investigations made of reading of the Intel SDM, examples 
provided by the pfm library and the source code of perf, I am still not 
able to get sample. I think for now that my problem is related to the 
precise_ip parameter of the  perf_event_attr structure.

Any time I change this value from 0 to 1 or from 0 to 2 (2 is the value 
to enable PEBS isn't it ?) the perf_event_open system call failed with a 
"Not supported operation" error. Running perf mem record on this Sandy 
Bridge platform also result in the same error.

So my question is, which way should I follow to identify why I am not 
able to do load latency sampling on this hardware ?

Thanks for any advice,

----
Manu

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: Load latency sampling on Sandy Bridge
  2014-10-29  8:07 Load latency sampling on Sandy Bridge Manuel Selva
@ 2014-10-29 16:09 ` Vince Weaver
  2014-10-29 17:05   ` Manuel Selva
  0 siblings, 1 reply; 9+ messages in thread
From: Vince Weaver @ 2014-10-29 16:09 UTC (permalink / raw)
  To: Manuel Selva; +Cc: linux-perf-users@vger.kernel.org

On Wed, 29 Oct 2014, Manuel Selva wrote:

> I am trying to setup load latency sampling on a Sandy Bridge processor (Cpu
> familly 6, model 42, model name  Intel(R) Core(TM) i5-2520M CPU @ 2.50GHz)
> running a 3.13 linux kernel.
> 
> After deep investigations made of reading of the Intel SDM, examples provided
> by the pfm library and the source code of perf, I am still not able to get
> sample. I think for now that my problem is related to the precise_ip parameter
> of the  perf_event_attr structure.
> 
> Any time I change this value from 0 to 1 or from 0 to 2 (2 is the value to
> enable PEBS isn't it ?) the perf_event_open system call failed with a "Not
> supported operation" error. Running perf mem record on this Sandy Bridge
> platform also result in the same error.

Which event are you trying to use?

On my Ivybrige machine using 3.14 I am able to get latency values with
	pe.config=0x1cd;        
        pe.config1=3;           
        pe.precise_ip=2;

Vince

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: Load latency sampling on Sandy Bridge
  2014-10-29 16:09 ` Vince Weaver
@ 2014-10-29 17:05   ` Manuel Selva
  2014-10-29 18:53     ` Vince Weaver
  0 siblings, 1 reply; 9+ messages in thread
From: Manuel Selva @ 2014-10-29 17:05 UTC (permalink / raw)
  To: Vince Weaver; +Cc: linux-perf-users@vger.kernel.org

The same event as the one you mentionned (I also checked that it's the same event than the  one used by perf mem record)

Setting precise-ip to 0 allows me to open the event and then mmap the result, but I don't have any sample.

Manu



> Le 29 oct. 2014 à 17:09, Vince Weaver <vincent.weaver@maine.edu> a écrit :
> 
>> On Wed, 29 Oct 2014, Manuel Selva wrote:
>> 
>> I am trying to setup load latency sampling on a Sandy Bridge processor (Cpu
>> familly 6, model 42, model name  Intel(R) Core(TM) i5-2520M CPU @ 2.50GHz)
>> running a 3.13 linux kernel.
>> 
>> After deep investigations made of reading of the Intel SDM, examples provided
>> by the pfm library and the source code of perf, I am still not able to get
>> sample. I think for now that my problem is related to the precise_ip parameter
>> of the  perf_event_attr structure.
>> 
>> Any time I change this value from 0 to 1 or from 0 to 2 (2 is the value to
>> enable PEBS isn't it ?) the perf_event_open system call failed with a "Not
>> supported operation" error. Running perf mem record on this Sandy Bridge
>> platform also result in the same error.
> 
> Which event are you trying to use?
> 
> On my Ivybrige machine using 3.14 I am able to get latency values with
>    pe.config=0x1cd;        
>        pe.config1=3;           
>        pe.precise_ip=2;
> 
> Vince

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: Load latency sampling on Sandy Bridge
  2014-10-29 18:53     ` Vince Weaver
@ 2014-10-29 18:50       ` Manuel Selva
  2014-10-29 19:12         ` Vince Weaver
  0 siblings, 1 reply; 9+ messages in thread
From: Manuel Selva @ 2014-10-29 18:50 UTC (permalink / raw)
  To: Vince Weaver; +Cc: linux-perf-users@vger.kernel.org

Yes, perf mem doesn't work on my Sandy Bridge. I should be missing 
something, maybe a kernel parameter somewhere, or something like that, 
but I don't know where searching ...

Manu

On 10/29/2014 07:53 PM, Vince Weaver wrote:
> On Wed, 29 Oct 2014, Manuel Selva wrote:
>
>> The same event as the one you mentionned (I also checked that it's the
>> same event than the one used by perf mem record)
>
> so perf mem record doesn't work for you either?
>
> I checked on my sandybridge-ep machine running Linux 3.14 and latency
> measurement seems to be working fine there too.
>
> Vince
>

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: Load latency sampling on Sandy Bridge
  2014-10-29 17:05   ` Manuel Selva
@ 2014-10-29 18:53     ` Vince Weaver
  2014-10-29 18:50       ` Manuel Selva
  0 siblings, 1 reply; 9+ messages in thread
From: Vince Weaver @ 2014-10-29 18:53 UTC (permalink / raw)
  To: Manuel Selva; +Cc: linux-perf-users@vger.kernel.org

On Wed, 29 Oct 2014, Manuel Selva wrote:

> The same event as the one you mentionned (I also checked that it's the 
> same event than the one used by perf mem record)

so perf mem record doesn't work for you either?

I checked on my sandybridge-ep machine running Linux 3.14 and latency 
measurement seems to be working fine there too.

Vince

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: Load latency sampling on Sandy Bridge
  2014-10-29 18:50       ` Manuel Selva
@ 2014-10-29 19:12         ` Vince Weaver
  2014-10-29 19:21           ` Manuel Selva
  0 siblings, 1 reply; 9+ messages in thread
From: Vince Weaver @ 2014-10-29 19:12 UTC (permalink / raw)
  To: Manuel Selva; +Cc: Vince Weaver, linux-perf-users@vger.kernel.org

On Wed, 29 Oct 2014, Manuel Selva wrote:

> Yes, perf mem doesn't work on my Sandy Bridge. I should be missing something,
> maybe a kernel parameter somewhere, or something like that, but I don't know
> where searching ...

well if you're getting operation not supported you are probably running 
into this chunk of code in arch/x86/kernel/cpu/perf_event.c


int x86_pmu_hw_config(struct perf_event *event)
{
        if (event->attr.precise_ip) {
                int precise = 0;

                /* Support for constant skid */
                if (x86_pmu.pebs_active && !x86_pmu.pebs_broken) {
                        precise++;

                        /* Support for IP fixup */
                        if (x86_pmu.lbr_nr || x86_pmu.intel_cap.pebs_format >= 2) 
                                precise++;
                }

                if (event->attr.precise_ip > precise)
                        return -EOPNOTSUPP;



and if you look, pebs_broken can be enabled on Sandybridge CPUs due to 
firmware errata.  Did you check your dmesg for messages starting with 
PEBS?

Vince

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: Load latency sampling on Sandy Bridge
  2014-10-29 19:12         ` Vince Weaver
@ 2014-10-29 19:21           ` Manuel Selva
  2014-10-29 20:02             ` Vince Weaver
  0 siblings, 1 reply; 9+ messages in thread
From: Manuel Selva @ 2014-10-29 19:21 UTC (permalink / raw)
  To: Vince Weaver; +Cc: linux-perf-users@vger.kernel.org

Yes the problem is there ! Thanks I am not enough "fluent" in kernel 
code to identify this. Here is my dmesg:

perf_event_intel: PEBS disabled due to CPU errata, please upgrade microcode

Does it mean that I must "upgrade my hardware" through the upgrade of 
microcode ? I never did such a thing.

Manu

On 10/29/2014 08:12 PM, Vince Weaver wrote:
> On Wed, 29 Oct 2014, Manuel Selva wrote:
>
>> Yes, perf mem doesn't work on my Sandy Bridge. I should be missing something,
>> maybe a kernel parameter somewhere, or something like that, but I don't know
>> where searching ...
>
> well if you're getting operation not supported you are probably running
> into this chunk of code in arch/x86/kernel/cpu/perf_event.c
>
>
> int x86_pmu_hw_config(struct perf_event *event)
> {
>          if (event->attr.precise_ip) {
>                  int precise = 0;
>
>                  /* Support for constant skid */
>                  if (x86_pmu.pebs_active && !x86_pmu.pebs_broken) {
>                          precise++;
>
>                          /* Support for IP fixup */
>                          if (x86_pmu.lbr_nr || x86_pmu.intel_cap.pebs_format >= 2)
>                                  precise++;
>                  }
>
>                  if (event->attr.precise_ip > precise)
>                          return -EOPNOTSUPP;
>
>
>
> and if you look, pebs_broken can be enabled on Sandybridge CPUs due to
> firmware errata.  Did you check your dmesg for messages starting with
> PEBS?
>
> Vince
>

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: Load latency sampling on Sandy Bridge
  2014-10-29 19:21           ` Manuel Selva
@ 2014-10-29 20:02             ` Vince Weaver
  2014-10-29 20:15               ` Manuel Selva
  0 siblings, 1 reply; 9+ messages in thread
From: Vince Weaver @ 2014-10-29 20:02 UTC (permalink / raw)
  To: Manuel Selva; +Cc: linux-perf-users@vger.kernel.org

On Wed, 29 Oct 2014, Manuel Selva wrote:

> perf_event_intel: PEBS disabled due to CPU errata, please upgrade microcode
> 
> Does it mean that I must "upgrade my hardware" through the upgrade of
> microcode ? I never did such a thing.

Usually the microcode is updated at boot time.  Usually your distribution 
will have some sort of microcode update package you can install that will 
do this for you automatically.

Vince

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: Load latency sampling on Sandy Bridge
  2014-10-29 20:02             ` Vince Weaver
@ 2014-10-29 20:15               ` Manuel Selva
  0 siblings, 0 replies; 9+ messages in thread
From: Manuel Selva @ 2014-10-29 20:15 UTC (permalink / raw)
  To: Vince Weaver; +Cc: linux-perf-users@vger.kernel.org

many thanks, it works !!!

On ubuntu: sudo apt-get install intel-microcode

-----
Manu

On 10/29/2014 09:02 PM, Vince Weaver wrote:
> On Wed, 29 Oct 2014, Manuel Selva wrote:
>
>> perf_event_intel: PEBS disabled due to CPU errata, please upgrade microcode
>>
>> Does it mean that I must "upgrade my hardware" through the upgrade of
>> microcode ? I never did such a thing.
>
> Usually the microcode is updated at boot time.  Usually your distribution
> will have some sort of microcode update package you can install that will
> do this for you automatically.
>
> Vince
> --
> To unsubscribe from this list: send the line "unsubscribe linux-perf-users" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>
>

^ permalink raw reply	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2014-10-29 20:15 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-10-29  8:07 Load latency sampling on Sandy Bridge Manuel Selva
2014-10-29 16:09 ` Vince Weaver
2014-10-29 17:05   ` Manuel Selva
2014-10-29 18:53     ` Vince Weaver
2014-10-29 18:50       ` Manuel Selva
2014-10-29 19:12         ` Vince Weaver
2014-10-29 19:21           ` Manuel Selva
2014-10-29 20:02             ` Vince Weaver
2014-10-29 20:15               ` Manuel Selva

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).