From: Philipp Zabel <p.zabel@pengutronix.de>
To: "Clément Le Goffic" <clement.legoffic@foss.st.com>,
"Will Deacon" <will@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Maxime Coquelin" <mcoquelin.stm32@gmail.com>,
"Alexandre Torgue" <alexandre.torgue@foss.st.com>,
"Jonathan Corbet" <corbet@lwn.net>,
"Gatien Chevallier" <gatien.chevallier@foss.st.com>,
"Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
"Gabriel Fernandez" <gabriel.fernandez@foss.st.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-perf-users@vger.kernel.org, devicetree@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
linux-clk@vger.kernel.org
Subject: Re: [PATCH 06/13] perf: stm32: introduce DDRPERFM driver
Date: Mon, 30 Jun 2025 10:38:21 +0200 [thread overview]
Message-ID: <5d4cf5bff7733421c8a031493742ba6a21e98583.camel@pengutronix.de> (raw)
In-Reply-To: <20250623-ddrperfm-upstream-v1-6-7dffff168090@foss.st.com>
On Mo, 2025-06-23 at 11:27 +0200, Clément Le Goffic wrote:
> Introduce the driver for the DDR Performance Monitor available on
> STM32MPU SoC.
>
> On STM32MP2 platforms, the DDRPERFM allows to monitor up to 8 DDR events
> that come from the DDR Controller such as read or write events.
>
> On STM32MP1 platforms, the DDRPERFM cannot monitor any event on any
> counter, there is a notion of set of events.
> Events from different sets cannot be monitored at the same time.
> The first chosen event selects the set.
> The set is coded in the first two bytes of the config value which is on 4
> bytes.
>
> On STM32MP25x series, the DDRPERFM clock is shared with the DDR controller
> and may be secured by bootloaders.
> Access controllers allow to check access to a resource. Use the access
> controller defined in the devicetree to know about the access to the
> DDRPERFM clock.
>
> Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
> ---
> drivers/perf/Kconfig | 11 +
> drivers/perf/Makefile | 1 +
> drivers/perf/stm32_ddr_pmu.c | 893 +++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 905 insertions(+)
>
[...]
> diff --git a/drivers/perf/stm32_ddr_pmu.c b/drivers/perf/stm32_ddr_pmu.c
> new file mode 100644
> index 000000000000..c0bce1f446a0
> --- /dev/null
> +++ b/drivers/perf/stm32_ddr_pmu.c
> @@ -0,0 +1,893 @@
[...]
> + if (of_property_present(pdev->dev.of_node, "resets")) {
> + rst = devm_reset_control_get(&pdev->dev, NULL);
Use devm_reset_control_get_optional_exclusive() instead. It returns
NULL if the device tree doesn't contain a resets property.
> + if (IS_ERR(rst)) {
> + dev_err(&pdev->dev, "Failed to get reset\n");
Please consider using dev_err_probe() instead.
> + ret = PTR_ERR(rst);
> + goto err_clk;
> + }
> + reset_control_assert(rst);
> + reset_control_deassert(rst);
These can be done unconditionally, as they are no-ops for rst == NULL.
regards
Philipp
next prev parent reply other threads:[~2025-06-30 8:38 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-23 9:27 [PATCH 00/13] Introduce STM32 DDR PMU for STM32MP platforms Clément Le Goffic
2025-06-23 9:27 ` [PATCH 01/13] bus: firewall: move stm32_firewall header file in include folder Clément Le Goffic
2025-06-23 9:27 ` [PATCH 02/13] dt-bindings: stm32: stm32mp25: add `access-controller-cell` property Clément Le Goffic
2025-06-23 10:32 ` Rob Herring (Arm)
2025-06-23 9:27 ` [PATCH 03/13] clk: stm32mp25: add firewall grant_access ops Clément Le Goffic
2025-06-23 9:27 ` [PATCH 04/13] arm64: dts: st: set rcc as an access-controller Clément Le Goffic
2025-06-23 9:27 ` [PATCH 05/13] dt-bindings: perf: stm32: introduce DDRPERFM dt-bindings Clément Le Goffic
2025-06-23 9:48 ` Krzysztof Kozlowski
2025-06-23 15:00 ` Clement LE GOFFIC
2025-06-23 9:27 ` [PATCH 06/13] perf: stm32: introduce DDRPERFM driver Clément Le Goffic
2025-06-23 9:45 ` Krzysztof Kozlowski
2025-06-23 15:02 ` Clement LE GOFFIC
2025-06-24 10:43 ` Clement LE GOFFIC
2025-06-25 6:35 ` Krzysztof Kozlowski
2025-06-25 8:33 ` Clement LE GOFFIC
2025-06-25 8:48 ` Krzysztof Kozlowski
2025-06-25 9:09 ` Clement LE GOFFIC
2025-06-23 20:43 ` kernel test robot
2025-06-26 23:52 ` kernel test robot
2025-06-30 8:38 ` Philipp Zabel [this message]
2025-07-02 14:13 ` Clement LE GOFFIC
2025-06-23 9:27 ` [PATCH 07/13] Documentation: perf: stm32: add ddrperfm support Clément Le Goffic
2025-06-23 9:27 ` [PATCH 08/13] MAINTAINERS: add myself as STM32 DDR PMU maintainer Clément Le Goffic
2025-06-23 9:27 ` [PATCH 09/13] ARM: dts: stm32: add ddrperfm on stm32mp131 Clément Le Goffic
2025-06-23 9:27 ` [PATCH 10/13] ARM: dts: stm32: add ddrperfm on stm32mp151 Clément Le Goffic
2025-06-23 9:27 ` [PATCH 11/13] arm64: dts: st: add ddrperfm on stm32mp251 Clément Le Goffic
2025-06-23 9:27 ` [PATCH 12/13] arm64: dts: st: support ddrperfm on stm32mp257f-dk Clément Le Goffic
2025-06-23 9:27 ` [PATCH 13/13] arm64: dts: st: support ddrperfm on stm32mp257f-ev1 Clément Le Goffic
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