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Mon, 15 Dec 2025 00:40:01 -0800 (PST) Message-ID: <651e1a79-356f-4f86-a6c3-8119f1c6c98f@linaro.org> Date: Mon, 15 Dec 2025 10:40:04 +0200 Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] perf c2c: Update documentation for adding memory event table To: Leo Yan Cc: linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Arnaldo Carvalho de Melo , Namhyung Kim , Ian Rogers , Mike Leach , Will Deacon , Mark Rutland , Jiri Olsa , Adrian Hunter , Al Grant References: <20251212-perf_c2c_update_event-v2-0-27df9a6cb1d4@arm.com> <20251212-perf_c2c_update_event-v2-2-27df9a6cb1d4@arm.com> Content-Language: en-US From: James Clark In-Reply-To: <20251212-perf_c2c_update_event-v2-2-27df9a6cb1d4@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 12/12/2025 19:25, Leo Yan wrote: > Users may occasionally need to see which options are applied to memory > events. This helps to understand the behavior of "perf c2c" and > "perf mem", and provides guidance for configuring memory event options > directly. > > Add a table to track memory events and their corresponding options, and > include the Arm SPE events in it. > > Suggested-by: Al Grant > Signed-off-by: Leo Yan Reviewed-by: James Clark > --- > tools/perf/Documentation/perf-c2c.txt | 51 +++++++++++++++++++++++++---------- > 1 file changed, 37 insertions(+), 14 deletions(-) > > diff --git a/tools/perf/Documentation/perf-c2c.txt b/tools/perf/Documentation/perf-c2c.txt > index 40b0f71a2c44eb642ff3bb234631a614b7c4fc9d..e57a122b8719f1b2e20dd509959fc1563a6c20fd 100644 > --- a/tools/perf/Documentation/perf-c2c.txt > +++ b/tools/perf/Documentation/perf-c2c.txt > @@ -160,20 +160,43 @@ Following perf record options are configured by default: > > -W,-d,--phys-data,--sample-cpu > > -Unless specified otherwise with '-e' option, following events are monitored by > -default on Intel: > - > - cpu/mem-loads,ldlat=30/P > - cpu/mem-stores/P > - > -following on AMD: > - > - ibs_op// > - > -and following on PowerPC: > - > - cpu/mem-loads/ > - cpu/mem-stores/ > +The following table lists the events monitored on different architectures. > +Unless specified otherwise with the -e option, the tool will select the > +default events. > + > + +--------+---------------+-----------------+--------------------------------------------------------------------------------+ > + | Arch | Configuration | Options | Events | > + +--------+---------------+-----------------+--------------------------------------------------------------------------------+ > + | Intel | Default | -e ldlat-loads | cpu/mem-loads,ldlat=30/P | > + | | | -e ldlat-stores | cpu/mem-stores/P | > + | |---------------+-----------------+--------------------------------------------------------------------------------+ > + | | Load only | -e ldlat-loads | cpu/mem-loads,ldlat=30/P | > + | |---------------+-----------------+--------------------------------------------------------------------------------+ > + | | Store only | -e ldlat-stores | cpu/mem-stores/P | > + +--------+---------------+-----------------+--------------------------------------------------------------------------------+ > + | Intel | Default | -e ldlat-loads | {cpu/mem-loads-aux/,cpu/mem-loads,ldlat=30/}:P | > + | with | | -e ldlat-stores | cpu/mem-stores/P | > + | AUX |--------------+------------------+--------------------------------------------------------------------------------+ > + | | Load only | -e ldlat-loads | {cpu/mem-loads-aux/,cpu/mem-loads,ldlat=30/}:P | > + | |---------------+-----------------+--------------------------------------------------------------------------------+ > + | | Store only | -e ldlat-stores | cpu/mem-stores/P | > + +--------+---------------+-----------------+--------------------------------------------------------------------------------+ > + | AMD | Default | -e mem-ldst | ibs_op// (without latency support) | > + | | | | ibs_op/ldlat=30/ (with latency support) | > + +--------+---------------+-----------------+--------------------------------------------------------------------------------+ > + | PowerPC| Default | -e ldlat-loads | cpu/mem-loads/ | > + | | | -e ldlat-stores | cpu/mem-stores/ | > + | |---------------+-----------------+--------------------------------------------------------------------------------+ > + | | Load only | -e ldlat-loads | cpu/mem-loads/ | > + | |---------------+-----------------+--------------------------------------------------------------------------------+ > + | | Store only | -e ldlat-stores | cpu/mem-stores/ | > + +--------+---------------+-----------------+--------------------------------------------------------------------------------+ > + | Arm | Default | -e spe-ldst | arm_spe_0/ts_enable=1,pa_enable=1,load_filter=1,store_filter=1,min_latency=30/ | > + | SPE |---------------+-----------------+--------------------------------------------------------------------------------+ > + | | Load only | -e spe-load | arm_spe_0/ts_enable=1,pa_enable=1,load_filter=1,min_latency=30/ | > + | |---------------+-----------------+--------------------------------------------------------------------------------+ > + | | Store only | -e spe-store | arm_spe_0/ts_enable=1,pa_enable=1,store_filter=1/ | > + +--------+---------------+-----------------+--------------------------------------------------------------------------------+ > > User can pass any 'perf record' option behind '--' mark, like (to enable > callchains and system wide monitoring): >