From: "Shenlin Liang" <liangshenlin@eswincomputing.com>
To: "Anup Patel" <anup@brainfault.org>
Cc: atishp@atishpatra.org, paul.walmsley@sifive.com,
palmer@dabbelt.com, aou@eecs.berkeley.edu, kvm@vger.kernel.org,
kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, peterz@infradead.org,
mingo@redhat.com, acme@kernel.org, namhyung@kernel.org,
mark.rutland@arm.com, alexander.shishkin@linux.intel.com,
jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com,
linux-perf-users@vger.kernel.org
Subject: Re: [PATCH 1/2] RISCV: KVM: add tracepoints for entry and exit events
Date: Thu, 11 Apr 2024 15:24:07 +0800 (GMT+08:00) [thread overview]
Message-ID: <66245675.2875.18ecc0add4b.Coremail.liangshenlin@eswincomputing.com> (raw)
In-Reply-To: <CAAhSdy0DgW055iV7=_D6iOLr1iVeK9SZmG8hqBG0_hb1z=+07g@mail.gmail.com>
On 2024-04-08 20:37, Anup Patel <anup@brainfault.org> wrote:
>
> On Thu, Mar 28, 2024 at 8:49 AM Shenlin Liang
> <liangshenlin@eswincomputing.com> wrote:
> >
> > Like other architectures, RISCV KVM also needs to add these event
> > tracepoints to count the number of times kvm guest entry/exit.
> >
> > Signed-off-by: Shenlin Liang <liangshenlin@eswincomputing.com>
> > ---
> > arch/riscv/kvm/trace_riscv.h | 60 ++++++++++++++++++++++++++++++++++++
> > arch/riscv/kvm/vcpu.c | 7 +++++
> > 2 files changed, 67 insertions(+)
> > create mode 100644 arch/riscv/kvm/trace_riscv.h
> >
> > diff --git a/arch/riscv/kvm/trace_riscv.h b/arch/riscv/kvm/trace_riscv.h
> > new file mode 100644
> > index 000000000000..5848083c7a5e
> > --- /dev/null
> > +++ b/arch/riscv/kvm/trace_riscv.h
> > @@ -0,0 +1,60 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Tracepoints for RISC-V KVM
> > + *
> > + * Copyright 2024 Beijing ESWIN Computing Technology Co., Ltd.
> > + *
> > + */
> > +#if !defined(_TRACE_RSICV_KVM_H) || defined(TRACE_HEADER_MULTI_READ)
> > +#define _TRACE_RSICV_KVM_H
>
> s/_RSICV_/_RISCV_/
>
> > +
> > +#include <linux/tracepoint.h>
> > +
> > +#undef TRACE_SYSTEM
> > +#define TRACE_SYSTEM kvm
> > +
> > +TRACE_EVENT(kvm_entry,
> > + TP_PROTO(struct kvm_vcpu *vcpu),
> > + TP_ARGS(vcpu),
> > +
> > + TP_STRUCT__entry(
> > + __field(unsigned long, pc)
> > + ),
> > +
> > + TP_fast_assign(
> > + __entry->pc = vcpu->arch.guest_context.sepc;
> > + ),
> > +
> > + TP_printk("PC: 0x%016lx", __entry->pc)
> > +);
> > +
> > +TRACE_EVENT(kvm_exit,
> > + TP_PROTO(struct kvm_vcpu *vcpu, unsigned long exit_reason,
> > + unsigned long scause),
> > + TP_ARGS(vcpu, exit_reason, scause),
> > +
> > + TP_STRUCT__entry(
> > + __field(unsigned long, pc)
> > + __field(unsigned long, exit_reason)
> > + __field(unsigned long, scause)
>
> This is not the right contents describing a KVM exit.
>
> The fields over here should be aligned with "struct kvm_cpu_trap"
> so we should have following fields:
> __field(unsigned long, sepc)
> __field(unsigned long, scause)
> __field(unsigned long, stval)
> __field(unsigned long, htval)
> __field(unsigned long, htinst)
>
> > + ),
> > +
> > + TP_fast_assign(
> > + __entry->pc = vcpu->arch.guest_context.sepc;
> > + __entry->exit_reason = exit_reason;
> > + __entry->scause = scause;
> > + ),
> > +
> > + TP_printk("EXIT_REASON:0x%lx,PC: 0x%016lx,SCAUSE:0x%lx",
> > + __entry->exit_reason, __entry->pc, __entry->scause)
> > +);
> > +
> > +#endif /* _TRACE_RSICV_KVM_H */
> > +
> > +#undef TRACE_INCLUDE_PATH
> > +#define TRACE_INCLUDE_PATH .
> > +#undef TRACE_INCLUDE_FILE
> > +#define TRACE_INCLUDE_FILE trace_riscv
> > +
> > +/* This part must be outside protection */
> > +#include <trace/define_trace.h>
> > diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> > index b5ca9f2e98ac..ed0932f0d514 100644
> > --- a/arch/riscv/kvm/vcpu.c
> > +++ b/arch/riscv/kvm/vcpu.c
> > @@ -21,6 +21,9 @@
> > #include <asm/cacheflush.h>
> > #include <asm/kvm_vcpu_vector.h>
> >
> > +#define CREATE_TRACE_POINTS
> > +#include "trace_riscv.h"
> > +
> > const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
> > KVM_GENERIC_VCPU_STATS(),
> > STATS_DESC_COUNTER(VCPU, ecall_exit_stat),
> > @@ -782,6 +785,8 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
> > */
> > kvm_riscv_local_tlb_sanitize(vcpu);
> >
> > + trace_kvm_entry(vcpu);
> > +
> > guest_timing_enter_irqoff();
> >
> > kvm_riscv_vcpu_enter_exit(vcpu);
> > @@ -820,6 +825,8 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
> >
> > local_irq_enable();
> >
> > + trace_kvm_exit(vcpu, run->exit_reason, trap.scause);
> > +
> > preempt_enable();
> >
> > kvm_vcpu_srcu_read_lock(vcpu);
> > --
> > 2.37.2
> >
>
> Regards,
> Anup
Thank you for the review. I will send the v2 version.
next prev parent reply other threads:[~2024-04-11 7:26 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-28 3:12 [PATCH 0/2] perf kvm: Add kvm stat support on riscv Shenlin Liang
2024-03-28 3:12 ` [PATCH 1/2] RISCV: KVM: add tracepoints for entry and exit events Shenlin Liang
2024-04-08 12:07 ` Anup Patel
2024-04-11 7:24 ` Shenlin Liang [this message]
2024-04-10 7:12 ` Eric Cheng
2024-04-11 7:24 ` Shenlin Liang
2024-03-28 3:12 ` [PATCH 2/2] perf kvm/riscv: Port perf kvm stat to RISC-V Shenlin Liang
2024-04-07 2:31 ` [PATCH 0/2] perf kvm: Add kvm stat support on riscv Shenlin Liang
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