From: Paul Walmsley <pjw@kernel.org>
To: Atish Patra <atish.patra@linux.dev>
Cc: Jiri Olsa <jolsa@kernel.org>, Paul Walmsley <pjw@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Rob Herring <robh@kernel.org>, Anup Patel <anup@brainfault.org>,
Namhyung Kim <namhyung@kernel.org>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Ian Rogers <irogers@google.com>, Will Deacon <will@kernel.org>,
James Clark <james.clark@linaro.org>,
linux-arm-kernel@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-perf-users@vger.kernel.org,
Conor Dooley <conor@kernel.org>
Subject: Re: [PATCH v8 04/22] dt-bindings: riscv: add Sxcsrind ISA extension description
Date: Tue, 4 Aug 2026 18:29:28 -0600 (MDT) [thread overview]
Message-ID: <66661b25-5cef-6590-b885-31cf954a16ce@kernel.org> (raw)
In-Reply-To: <20260701-counter_delegation-v8-4-7909f863a645@meta.com>
On Wed, 1 Jul 2026, Atish Patra wrote:
> From: Atish Patra <atishp@rivosinc.com>
>
> Add the S[m|s]csrind ISA extension description.
>
> Acked-by: Rob Herring (Arm) <robh@kernel.org>
> Signed-off-by: Atish Patra <atishp@rivosinc.com>
Along the lines of the comments on patches 2 and 3, here's what's been
queued for v7.3.
- Paul
From: Atish Patra <atishp@rivosinc.com>
dt-bindings: riscv: add Smcsrind and Sscsrind ISA extension descriptions
Add the S[m|s]csrind ISA extension description.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://patch.msgid.link/20260701-counter_delegation-v8-4-7909f863a645@meta.com
[pjw@kernel.org: use official extension names in the patch description]
Signed-off-by: Paul Walmsley <pjw@kernel.org>
---
.../devicetree/bindings/riscv/extensions.yaml | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index 5ffc40d599c0..ccff2be1224d 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -181,6 +181,14 @@ properties:
changes to interrupts as frozen at commit ccbddab ("Merge pull
request #42 from riscv/jhauser-2023-RC4") of riscv-aia.
+ - const: smcsrind
+ description: |
+ The standard Smcsrind machine-level extension extends the
+ indirect CSR access mechanism defined by the Smaia extension. This
+ extension allows other ISA extensions to use indirect CSR access
+ mechanism in M-mode as ratified in the 20240326 version of the
+ privileged ISA specification.
+
- const: smmpm
description: |
The standard Smmpm extension for M-mode pointer masking as
@@ -226,6 +234,14 @@ properties:
Profiles Version 1.0, with commit b1d806605f87 ("Updated to
ratified state.")
+ - const: sscsrind
+ description: |
+ The standard Sscsrind supervisor-level extension extends the
+ indirect CSR access mechanism defined by the Ssaia extension. This
+ extension allows other ISA extensions to use indirect CSR access
+ mechanism in S-mode as ratified in the 20240326 version of the
+ privileged ISA specification.
+
- const: ssnpm
description: |
The standard Ssnpm extension for next-mode pointer masking as
--
2.53.0
next prev parent reply other threads:[~2026-08-05 0:29 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 8:46 [PATCH v8 00/22] Add Counter delegation ISA extension support Atish Patra
2026-07-01 8:46 ` [PATCH v8 01/22] RISC-V: perf: fix resource cleanup on driver probe failure Atish Patra
2026-07-01 9:11 ` sashiko-bot
2026-07-20 7:21 ` Charlie Jenkins
2026-08-04 23:25 ` Paul Walmsley
2026-07-01 8:46 ` [PATCH v8 02/22] RISC-V: Add Sxcsrind ISA extension CSR definitions Atish Patra
2026-07-20 7:21 ` Charlie Jenkins
2026-08-04 23:35 ` Paul Walmsley
2026-08-04 23:42 ` Paul Walmsley
2026-08-05 7:30 ` Atish Patra
2026-07-01 8:46 ` [PATCH v8 03/22] RISC-V: Add Sxcsrind ISA extension definition and parsing Atish Patra
2026-07-20 7:21 ` Charlie Jenkins
2026-08-04 23:58 ` Paul Walmsley
2026-07-01 8:46 ` [PATCH v8 04/22] dt-bindings: riscv: add Sxcsrind ISA extension description Atish Patra
2026-08-05 0:29 ` Paul Walmsley [this message]
2026-07-01 8:46 ` [PATCH v8 05/22] RISC-V: Define indirect CSR access helpers Atish Patra
2026-07-20 7:21 ` Charlie Jenkins
2026-08-05 0:39 ` Paul Walmsley
2026-08-05 7:59 ` Atish Patra
2026-08-05 8:07 ` Atish Patra
2026-07-01 8:46 ` [PATCH v8 06/22] RISC-V: Add Smcntrpmf extension parsing Atish Patra
2026-07-20 7:21 ` Charlie Jenkins
2026-08-05 0:44 ` Paul Walmsley
2026-07-01 8:46 ` [PATCH v8 07/22] dt-bindings: riscv: add Smcntrpmf ISA extension description Atish Patra
2026-08-05 0:44 ` Paul Walmsley
2026-07-01 8:46 ` [PATCH v8 08/22] RISC-V: Add Sscfg extension CSR definition Atish Patra
2026-07-20 7:21 ` Charlie Jenkins
2026-08-05 0:43 ` Paul Walmsley
2026-07-01 8:46 ` [PATCH v8 09/22] RISC-V: Add Ssccfg/Smcdeleg ISA extension definition and parsing Atish Patra
2026-07-01 9:11 ` sashiko-bot
2026-07-20 7:21 ` Charlie Jenkins
2026-08-05 0:46 ` Paul Walmsley
2026-07-01 8:46 ` [PATCH v8 10/22] dt-bindings: riscv: add Counter delegation ISA extensions description Atish Patra
2026-08-05 0:48 ` Paul Walmsley
2026-07-01 8:46 ` [PATCH v8 11/22] RISC-V: perf: Restructure the SBI PMU code Atish Patra
2026-08-05 2:29 ` Paul Walmsley
2026-08-05 8:26 ` Atish Patra
2026-07-01 8:47 ` [PATCH v8 12/22] RISC-V: perf: Modify the counter discovery mechanism Atish Patra
2026-07-01 9:20 ` sashiko-bot
2026-07-07 7:45 ` Yicong Yang
2026-08-05 8:46 ` Atish Patra
2026-07-20 7:21 ` Charlie Jenkins
2026-07-01 8:47 ` [PATCH v8 13/22] RISC-V: perf: Add a mechanism to defined legacy event encoding Atish Patra
2026-07-01 9:19 ` sashiko-bot
2026-07-07 7:51 ` Yicong Yang
2026-08-03 21:53 ` Atish Patra
2026-07-20 7:21 ` Charlie Jenkins
2026-07-01 8:47 ` [PATCH v8 14/22] RISC-V: perf: Implement supervisor counter delegation support Atish Patra
2026-07-01 9:27 ` sashiko-bot
2026-07-07 8:24 ` Yicong Yang
2026-08-06 2:00 ` Atish Patra
2026-08-06 12:16 ` Yicong Yang
2026-08-06 21:45 ` Atish Patra
2026-07-20 7:21 ` Charlie Jenkins
2026-07-01 8:47 ` [PATCH v8 15/22] RISC-V: perf: Skip PMU SBI extension when not implemented Atish Patra
2026-07-01 9:26 ` sashiko-bot
2026-07-01 8:47 ` [PATCH v8 16/22] RISC-V: perf: Use config2/vendor table for event to counter mapping Atish Patra
2026-07-01 9:35 ` sashiko-bot
2026-07-20 7:21 ` Charlie Jenkins
2026-07-01 8:47 ` [PATCH v8 17/22] RISC-V: perf: Add legacy event encodings via sysfs Atish Patra
2026-07-20 7:21 ` Charlie Jenkins
2026-07-01 8:47 ` [PATCH v8 18/22] RISC-V: perf: Add Qemu virt machine events Atish Patra
2026-07-20 7:21 ` Charlie Jenkins
2026-07-01 8:47 ` [PATCH v8 19/22] tools/perf: Support event code for arch standard events Atish Patra
2026-07-01 17:44 ` Ian Rogers
2026-07-01 8:47 ` [PATCH v8 20/22] tools/perf: Add RISC-V CounterIDMask event field Atish Patra
2026-07-01 17:44 ` Ian Rogers
2026-07-01 8:47 ` [PATCH v8 21/22] TEST(do-not-upstream): fake qemu-virt PMU events for cdeleg counter-mask testing Atish Patra
2026-07-01 9:38 ` sashiko-bot
2026-07-01 8:47 ` [PATCH v8 22/22] TEST(do-not-upstream): fake qemu vendor JSON + mapfile entry for CounterIDMask path Atish Patra
2026-07-01 9:34 ` sashiko-bot
2026-08-05 1:00 ` [PATCH v8 00/22] Add Counter delegation ISA extension support patchwork-bot+linux-riscv
2026-08-05 2:14 ` Paul Walmsley
2026-08-05 8:03 ` Atish Patra
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