From: James Clark <james.clark@linaro.org>
To: Mike Leach <mike.leach@linaro.org>, Leo Yan <leo.yan@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@kernel.org>, Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
John Garry <john.g.garry@oracle.com>,
Will Deacon <will@kernel.org>, Leo Yan <leo.yan@linux.dev>,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 4/7] perf cs-etm: Don't use hard coded config bits when setting up ETMCR
Date: Thu, 4 Dec 2025 13:48:40 +0000 [thread overview]
Message-ID: <745f9aa8-6f09-46ac-9612-536fa8292825@linaro.org> (raw)
In-Reply-To: <CAJ9a7Vgn+HBSO0d3s-x+vjqk3Zfm2shpW1di12_OEZVSN6S0yw@mail.gmail.com>
On 04/12/2025 1:45 pm, Mike Leach wrote:
> Hi,
>
> On Thu, 4 Dec 2025 at 10:55, James Clark <james.clark@linaro.org> wrote:
>>
>>
>>
>> On 02/12/2025 11:53 am, James Clark wrote:
>>>
>>>
>>> On 02/12/2025 11:43 am, Leo Yan wrote:
>>>> On Mon, Dec 01, 2025 at 04:41:07PM +0000, Coresight ML wrote:
>>>>
>>>> [...]
>>>>
>>>>> @@ -746,7 +779,7 @@ static void cs_etm_get_metadata(struct perf_cpu
>>>>> cpu, u32 *offset,
>>>>> case CS_ETMV3:
>>>>> magic = __perf_cs_etmv3_magic;
>>>>> /* Get configuration register */
>>>>> - info->priv[*offset + CS_ETM_ETMCR] = cs_etm_get_config(itr);
>>>>> + info->priv[*offset + CS_ETM_ETMCR] = cs_etm_guess_etmcr(itr);
>>>>
>>>> I still think cs_etm_get_config() is better than cs_etm_guess_etmcr().
>>>>
>>>> For ETMv3, we directly pass CONFIG to the kernel, and after validation
>>>> in the dirver, then the value will be set to ETMCR. If we already know
>>>> the config value is consistent between user space and kernel, why
>>
>> One other note is that since moving the timestamp field, this is no
>> longer true either. The value in attr.config isn't directly put into ETMCR.
>>
>>>> introduce a redundant "guess" operation here?
>>>>
>>>> Thanks,
>>>> Leo
>>>
>>> Because userspace doesn't always come up with the same value as the
>>> driver. For example right now in ETM3, ETMCR_RETURN_STACK isn't set
>>> depending on certain conditions that userspace doesn't know about. ETM4
>>> has the same for TRCCONFIGR_RS and maybe some others. In the future,
>>> other versions of the driver could do different things as long as we
>>> don't break decoding.
>>>
>>> I didn't want the function name to imply it was doing something it
>>> wasn't as that confused me a little bit. It's definitely not "getting"
>>> the value. Maybe "guess" isn't the best it could be, but it's not far off.
>>>
>>
>
> Perhaps cs_etm_synth_etmcr()? We cannot read it directly as it has not
synth is a good name, I can use that.
> been set at the time of creating these headers. (unlike the sets of
> static read only IDR regs that we do read).
>
> When in perf mode the only configuration bits set in the ConfigR for
> either ETM3 or 4 are those generated or implied by parameters on the
> perf command line.
> This info has to pass from perf to the driver somehow. Evidently many
> years ago, when only ETMv3/PTM existed the easy way was perf.config ==
> etm.configr, now that is no longer feasible.
> As long as perf and the drivers interpret the command line attributes
> in the same way - all is well.
>
> As James says, the actual configr can differ from the synth one - the
> key is the bits that control the trace format - e.g. cyclecounts,
> rather than trace filtering e.g. userspace/kernel that affects the
> drivers configr but not the synthesized value in perf.
> Decode cares about format, not about filtering. Additionally some
> things - like return-stack are implementation dependent - optional on
> PTM, not at all on ETMv3. If the trace unit does not support it then
> the drivers ignore this. the only effect on the trace output is less
> compression if retstack cannot be used.
>
> Generally decode needs to know about things that affect format and
> function, rather than filtering.
>
> Mike
next prev parent reply other threads:[~2025-12-04 13:48 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-01 16:41 [PATCH 0/7] perf cs-etm/arm-spe: Remove hard coded config fields James Clark
2025-12-01 16:41 ` [PATCH 1/7] perf tools: Track all user changed config bits James Clark
2025-12-02 10:15 ` Leo Yan
2025-12-02 10:40 ` James Clark
2025-12-02 11:21 ` Leo Yan
2025-12-02 12:36 ` Leo Yan
2025-12-01 16:41 ` [PATCH 2/7] perf tools: apply evsel__set_config_if_unset() to all config fields James Clark
2025-12-02 11:14 ` Leo Yan
2025-12-04 10:55 ` James Clark
2025-12-01 16:41 ` [PATCH 3/7] perf cs-etm: Make a helper to find the Coresight evsel James Clark
2025-12-02 11:24 ` Leo Yan
2025-12-01 16:41 ` [PATCH 4/7] perf cs-etm: Don't use hard coded config bits when setting up ETMCR James Clark
2025-12-02 11:43 ` Leo Yan
2025-12-02 11:53 ` James Clark
2025-12-04 10:55 ` James Clark
2025-12-04 13:45 ` Mike Leach
2025-12-04 13:48 ` James Clark [this message]
2025-12-01 16:41 ` [PATCH 5/7] perf cs-etm: Don't use hard coded config bits when setting up TRCCONFIGR James Clark
2025-12-02 12:01 ` Leo Yan
2025-12-01 16:41 ` [PATCH 6/7] perf cs-etm: Don't hard code config attribute when configuring the event James Clark
2025-12-02 12:15 ` Leo Yan
2025-12-04 14:08 ` James Clark
2025-12-04 14:43 ` Leo Yan
2025-12-01 16:41 ` [PATCH 7/7] perf arm-spe: Don't hard code config attribute James Clark
2025-12-02 12:28 ` Leo Yan
2025-12-02 12:42 ` Leo Yan
2025-12-02 12:59 ` James Clark
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