From: "Liang, Kan" <kan.liang@linux.intel.com>
To: Dapeng Mi <dapeng1.mi@linux.intel.com>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Andi Kleen <ak@linux.intel.com>,
Eranian Stephane <eranian@google.com>
Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
Dapeng Mi <dapeng1.mi@intel.com>
Subject: Re: [Patch v3 0/7] x86 perf bug fixes and optimization
Date: Wed, 20 Aug 2025 08:55:24 -0700 [thread overview]
Message-ID: <75fbe025-214f-4b2c-8077-a8dbfa34a5c2@linux.intel.com> (raw)
In-Reply-To: <20250820023032.17128-1-dapeng1.mi@linux.intel.com>
On 2025-08-19 7:30 p.m., Dapeng Mi wrote:
> Changes:
> v2 -> v3:
> * Rebase to latest tip perf/core tree.
> * Rewrite commit message to explain why NULL access happens and
> refine code (Patch 3/7)
> * Refine commit message of patch 6/7
> * Dump counters bitmap instead of absolute counter in boot message
> (patch 7/7)
>
> v1 -> v2:
> * Rebase to 6.17-rc1.
> * No code changes.
>
> Tests:
> * Run perf stats/record commands on Intel Sapphire Rapids platform, no
> issue is found.
>
> History:
> v2: https://lore.kernel.org/all/20250811090034.51249-1-dapeng1.mi@linux.intel.com/
> v1:
> * Patch 1/6: https://lore.kernel.org/all/20250606111606.84350-1-dapeng1.mi@linux.intel.com/
> * Patch 2/6: https://lore.kernel.org/all/20250529080236.2552247-1-dapeng1.mi@linux.intel.com/
> * Patch 3/6: https://lore.kernel.org/all/20250718062602.21444-1-dapeng1.mi@linux.intel.com/
> * Patches 4-6/6: https://lore.kernel.org/all/20250717090302.11316-1-dapeng1.mi@linux.intel.com/
>
> Dapeng Mi (7):
> perf/x86/intel: Use early_initcall() to hook bts_init()
> perf/x86/intel: Fix IA32_PMC_x_CFG_B MSRs access error
> perf/x86: Check if cpuc->events[*] pointer exists before accessing it
> perf/x86: Add PERF_CAP_PEBS_TIMING_INFO flag
> perf/x86/intel: Change macro GLOBAL_CTRL_EN_PERF_METRICS to
> BIT_ULL(48)
> perf/x86/intel: Add ICL_FIXED_0_ADAPTIVE bit into
> INTEL_FIXED_BITS_MASK
> perf/x86: Print PMU counters bitmap in x86_pmu_show_pmu_cap()
>
The series looks good to me.
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Thanks,
Kan
> arch/x86/events/core.c | 16 +++++++++-------
> arch/x86/events/intel/bts.c | 2 +-
> arch/x86/events/intel/core.c | 21 +++++++++------------
> arch/x86/events/intel/ds.c | 10 ++++++++++
> arch/x86/include/asm/msr-index.h | 14 ++++++++------
> arch/x86/include/asm/perf_event.h | 8 ++++++--
> arch/x86/kvm/pmu.h | 2 +-
> tools/arch/x86/include/asm/msr-index.h | 14 ++++++++------
> 8 files changed, 52 insertions(+), 35 deletions(-)
>
>
> base-commit: 448f97fba9013ffa13f5dd82febd18836b189499
next prev parent reply other threads:[~2025-08-20 15:55 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-20 2:30 [Patch v3 0/7] x86 perf bug fixes and optimization Dapeng Mi
2025-08-20 2:30 ` [Patch v3 1/7] perf/x86/intel: Use early_initcall() to hook bts_init() Dapeng Mi
2025-08-20 2:30 ` [Patch v3 2/7] perf/x86/intel: Fix IA32_PMC_x_CFG_B MSRs access error Dapeng Mi
2025-08-20 2:30 ` [Patch v3 3/7] perf/x86: Check if cpuc->events[*] pointer exists before accessing it Dapeng Mi
2025-08-20 3:41 ` Andi Kleen
2025-08-20 5:33 ` Mi, Dapeng
2025-08-20 5:44 ` Andi Kleen
2025-08-20 5:54 ` Mi, Dapeng
2025-08-21 1:51 ` Andi Kleen
2025-08-21 13:35 ` Peter Zijlstra
2025-08-22 5:26 ` Mi, Dapeng
2025-08-26 3:47 ` Mi, Dapeng
2025-08-20 2:30 ` [Patch v3 4/7] perf/x86: Add PERF_CAP_PEBS_TIMING_INFO flag Dapeng Mi
2025-08-20 2:30 ` [Patch v3 5/7] perf/x86/intel: Change macro GLOBAL_CTRL_EN_PERF_METRICS to BIT_ULL(48) Dapeng Mi
2025-08-20 2:30 ` [Patch v3 6/7] perf/x86/intel: Add ICL_FIXED_0_ADAPTIVE bit into INTEL_FIXED_BITS_MASK Dapeng Mi
2025-08-20 2:30 ` [Patch v3 7/7] perf/x86: Print PMU counters bitmap in x86_pmu_show_pmu_cap() Dapeng Mi
2025-08-20 15:55 ` Liang, Kan [this message]
2025-08-21 13:39 ` [Patch v3 0/7] x86 perf bug fixes and optimization Peter Zijlstra
2025-08-22 5:29 ` Mi, Dapeng
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