Re: [PATCH 1/2] perf/ibs: Fix interface via core pmu events

[Ravi Bangoria <ravi.bangoria@amd.com>]

On 07-Mar-23 3:59 AM, Namhyung Kim wrote:
> On Thu, Mar 2, 2023 at 9:54 PM Ravi Bangoria <ravi.bangoria@amd.com> wrote:
>>
>> Hi Namhyung,
>>
>>>> diff --git a/kernel/events/core.c b/kernel/events/core.c
>>>> index a5a51dfdd622..c3f59d937280 100644
>>>> --- a/kernel/events/core.c
>>>> +++ b/kernel/events/core.c
>>>> @@ -11633,9 +11633,13 @@ static struct pmu *perf_init_event(struct perf_event *event)
>>>>                         goto fail;
>>>>
>>>>                 ret = perf_try_init_event(pmu, event);
>>>> -               if (ret == -ENOENT && event->attr.type != type && !extended_type) {
>>>> -                       type = event->attr.type;
>>>> -                       goto again;
>>>> +               if (ret == -ENOENT) {
>>>> +                       if (event->attr.type != type && !extended_type) {
>>>> +                               type = event->attr.type;
>>>> +                               goto again;
>>>> +                       }
>>>> +                       if (pmu->capabilities & PERF_PMU_CAP_FORWARD_EVENT)
>>>> +                               goto try_all;
>>>
>>> Wouldn't it be better to use a different error code to indicate
>>> it's about precise_ip (or forwarding in general)?  Otherwise
>>> other invalid config might cause the forwarding unnecessarily..
>>
>> That would make things easier and we might not need this new capability.
>> Most appropriate error codes seems ENOENT, EOPNOTSUPP and EINVAL but all
>> are already used for other purposes. Any other suggestions?
> 
> Maybe we can have more liberty for the error code since
> it's not returned to the user.  How about ESRCH, EIO or ENXIO?

Ok. We can probably use ESRCH, although it's meaning is little different:

  $ errno -l | grep ESRCH
  ESRCH 3 No such process

Thanks,
Ravi