From: "Zhang, Rui" <rui.zhang@intel.com>
To: "alexander.shishkin@linux.intel.com"
<alexander.shishkin@linux.intel.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"bp@alien8.de" <bp@alien8.de>,
"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
"peterz@infradead.org" <peterz@infradead.org>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"mingo@redhat.com" <mingo@redhat.com>,
"Dhananjay.Ugwekar@amd.com" <Dhananjay.Ugwekar@amd.com>,
"acme@kernel.org" <acme@kernel.org>,
"namhyung@kernel.org" <namhyung@kernel.org>,
"jolsa@kernel.org" <jolsa@kernel.org>,
"kan.liang@linux.intel.com" <kan.liang@linux.intel.com>,
"irogers@google.com" <irogers@google.com>,
"Hunter, Adrian" <adrian.hunter@intel.com>
Cc: "linux-perf-users@vger.kernel.org"
<linux-perf-users@vger.kernel.org>,
"ravi.bangoria@amd.com" <ravi.bangoria@amd.com>,
"ananth.narayan@amd.com" <ananth.narayan@amd.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"gautham.shenoy@amd.com" <gautham.shenoy@amd.com>,
"kprateek.nayak@amd.com" <kprateek.nayak@amd.com>,
"x86@kernel.org" <x86@kernel.org>
Subject: Re: [PATCH v6 09/10] perf/x86/rapl: Move the cntr_mask to rapl_pmus struct
Date: Fri, 1 Nov 2024 07:37:23 +0000 [thread overview]
Message-ID: <834cc58b9b46f6004e045e202fcd88d13ca363d0.camel@intel.com> (raw)
In-Reply-To: <20241025111348.3810-10-Dhananjay.Ugwekar@amd.com>
On Fri, 2024-10-25 at 11:13 +0000, Dhananjay Ugwekar wrote:
> Prepare for the addition of RAPL core energy counter support.
>
> Move cntr_mask to rapl_pmus struct instead of adding a new global
> cntr_mask for the new RAPL power_core PMU. This will also ensure that
> the second "core_cntr_mask" is only created if needed (i.e. in case
> of
> AMD CPUs).
>
> Signed-off-by: Dhananjay Ugwekar <Dhananjay.Ugwekar@amd.com>
Reviewed-by: Zhang Rui <rui.zhang@intel.com>
Tested-by: Zhang Rui <rui.zhang@intel.com>
thanks,
rui
> ---
> arch/x86/events/rapl.c | 15 ++++++++-------
> 1 file changed, 8 insertions(+), 7 deletions(-)
>
> diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c
> index e80b62cf9abc..d3acc70a3d31 100644
> --- a/arch/x86/events/rapl.c
> +++ b/arch/x86/events/rapl.c
> @@ -129,6 +129,7 @@ struct rapl_pmu {
> struct rapl_pmus {
> struct pmu pmu;
> unsigned int nr_rapl_pmu;
> + unsigned int cntr_mask;
> struct rapl_pmu *rapl_pmu[]
> __counted_by(nr_rapl_pmu);
> };
>
> @@ -148,7 +149,6 @@ struct rapl_model {
> /* 1/2^hw_unit Joule */
> static int rapl_pkg_hw_unit[NR_RAPL_PKG_DOMAINS] __read_mostly;
> static struct rapl_pmus *rapl_pmus_pkg;
> -static unsigned int rapl_pkg_cntr_mask;
> static u64 rapl_timer_ms;
> static struct rapl_model *rapl_model;
>
> @@ -358,7 +358,7 @@ static int rapl_pmu_event_init(struct perf_event
> *event)
> bit = cfg - 1;
>
> /* check event supported */
> - if (!(rapl_pkg_cntr_mask & (1 << bit)))
> + if (!(rapl_pmus_pkg->cntr_mask & (1 << bit)))
> return -EINVAL;
>
> /* unsupported modes and filters */
> @@ -586,10 +586,10 @@ static void __init rapl_advertise(void)
> int i;
>
> pr_info("API unit is 2^-32 Joules, %d fixed counters, %llu ms
> ovfl timer\n",
> - hweight32(rapl_pkg_cntr_mask), rapl_timer_ms);
> + hweight32(rapl_pmus_pkg->cntr_mask), rapl_timer_ms);
>
> for (i = 0; i < NR_RAPL_PKG_DOMAINS; i++) {
> - if (rapl_pkg_cntr_mask & (1 << i)) {
> + if (rapl_pmus_pkg->cntr_mask & (1 << i)) {
> pr_info("hw unit of domain %s 2^-%d
> Joules\n",
> rapl_pkg_domain_names[i],
> rapl_pkg_hw_unit[i]);
> }
> @@ -804,9 +804,6 @@ static int __init rapl_pmu_init(void)
>
> rapl_model = (struct rapl_model *) id->driver_data;
>
> - rapl_pkg_cntr_mask = perf_msr_probe(rapl_model-
> >rapl_pkg_msrs, PERF_RAPL_PKG_EVENTS_MAX,
> - false, (void *) &rapl_model-
> >pkg_events);
> -
> ret = rapl_check_hw_unit();
> if (ret)
> return ret;
> @@ -815,6 +812,10 @@ static int __init rapl_pmu_init(void)
> if (ret)
> return ret;
>
> + rapl_pmus_pkg->cntr_mask = perf_msr_probe(rapl_model-
> >rapl_pkg_msrs,
> +
> PERF_RAPL_PKG_EVENTS_MAX, false,
> + (void *)
> &rapl_model->pkg_events);
> +
> ret = perf_pmu_register(&rapl_pmus_pkg->pmu, "power", -1);
> if (ret)
> goto out;
next prev parent reply other threads:[~2024-11-01 7:37 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-25 11:13 [PATCH v6 00/10] Add RAPL core energy counter support for AMD CPUs Dhananjay Ugwekar
2024-10-25 11:13 ` [PATCH v6 01/10] perf/x86/rapl: Remove the unused get_rapl_pmu_cpumask() function Dhananjay Ugwekar
2024-10-28 6:12 ` Gautham R. Shenoy
2024-10-28 6:38 ` Dhananjay Ugwekar
2024-11-01 7:20 ` Zhang, Rui
2024-10-25 11:13 ` [PATCH v6 02/10] x86/topology: Introduce topology_logical_core_id() Dhananjay Ugwekar
2024-10-28 8:27 ` Gautham R. Shenoy
2024-10-25 11:13 ` [PATCH v6 03/10] perf/x86/rapl: Remove the cpu_to_rapl_pmu() function Dhananjay Ugwekar
2024-10-28 8:53 ` Gautham R. Shenoy
2024-10-28 9:19 ` Dhananjay Ugwekar
2024-11-01 8:06 ` Zhang, Rui
2024-11-04 3:15 ` Dhananjay Ugwekar
2024-11-04 7:15 ` Zhang, Rui
2024-11-04 8:04 ` Dhananjay Ugwekar
2024-11-01 7:28 ` Zhang, Rui
2024-10-25 11:13 ` [PATCH v6 04/10] perf/x86/rapl: Rename rapl_pmu variables Dhananjay Ugwekar
2024-10-28 9:01 ` Gautham R. Shenoy
2024-11-01 7:29 ` Zhang, Rui
2024-10-25 11:13 ` [PATCH v6 05/10] perf/x86/rapl: Make rapl_model struct global Dhananjay Ugwekar
2024-11-01 7:29 ` Zhang, Rui
2024-11-08 10:12 ` Gautham R. Shenoy
2024-10-25 11:13 ` [PATCH v6 06/10] perf/x86/rapl: Add arguments to the init and cleanup functions Dhananjay Ugwekar
2024-10-28 12:31 ` Gautham R. Shenoy
2024-11-01 7:29 ` Zhang, Rui
2024-10-25 11:13 ` [PATCH v6 07/10] perf/x86/rapl: Modify the generic variable names to *_pkg* Dhananjay Ugwekar
2024-10-28 14:27 ` Gautham R. Shenoy
2024-11-01 7:29 ` Zhang, Rui
2024-10-25 11:13 ` [PATCH v6 08/10] perf/x86/rapl: Remove the global variable rapl_msrs Dhananjay Ugwekar
2024-10-28 14:35 ` Gautham R. Shenoy
2024-11-01 7:30 ` Zhang, Rui
2024-10-25 11:13 ` [PATCH v6 09/10] perf/x86/rapl: Move the cntr_mask to rapl_pmus struct Dhananjay Ugwekar
2024-10-28 14:54 ` Gautham R. Shenoy
2024-11-01 7:37 ` Zhang, Rui [this message]
2024-10-25 11:13 ` [PATCH v6 10/10] perf/x86/rapl: Add core energy counter support for AMD CPUs Dhananjay Ugwekar
2024-11-08 9:52 ` Gautham R. Shenoy
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