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From: Marc Zyngier <maz@kernel.org>
To: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Cc: "Liang,  Kan" <kan.liang@linux.intel.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Conor Dooley <conor+dt@kernel.org>,
	Douglas Anderson <dianders@chromium.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Ian Rogers <irogers@google.com>, Ingo Molnar <mingo@redhat.com>,
	James Clark <james.clark@linaro.org>,
	Jiri Olsa <jolsa@kernel.org>,
	John Garry <john.g.garry@oracle.com>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Leo Yan <leo.yan@linux.dev>,
	Lorenzo Pieralisi <lpieralisi@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Mike Leach <mike.leach@linaro.org>,
	Namhyung Kim <namhyung@kernel.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	Peter Zijlstra <peterz@infradead.org>,
	Rob Herring <robh@kernel.org>, Will Deacon <will@kernel.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-perf-users@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH v5 6/7] arm64: dts: renesas: Add R8A78000 X5H DTs
Date: Thu, 18 Sep 2025 11:01:26 +0100	[thread overview]
Message-ID: <86ikhg13m1.wl-maz@kernel.org> (raw)
In-Reply-To: <87ecs4nult.wl-kuninori.morimoto.gx@renesas.com>

3rd resend in a matter of hours -- how about slowing down?

Also, dropping Shameer's bouncing email address from Cc. Surely you
can fix your (enormous, and pretty random) Cc list?

On Thu, 18 Sep 2025 07:27:26 +0100,
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> wrote:
>

[...]

> +		/*
> +		 * The ARM GIC-720AE - View 1
> +		 *
> +		 * see
> +		 *	r19uh0244ej0052-r-carx5h.pdf
> +		 *	- attachments: 002_R-CarX5H_Address_Map_r0p51.xlsx
> +		 *	 - sheet [RT]
> +		 *	  - line 619
> +		 */
> +		gic: interrupt-controller@39000000 {
> +			compatible = "arm,gic-v3";
> +			#interrupt-cells = <3>;
> +			#address-cells = <0>;
> +			interrupt-controller;
> +			reg = <0 0x39000000 0 0x20000>,
> +			      <0 0x39080000 0 0x800000>;
> +			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> +		};

I already asked for:

- this comment to be dropped, as it serves zero purpose to the common
  mortal

- the ITS to be described. The HW has it, it has no dependency on
  anything else, so there is no reason to omit it.

So I'd suggest you slow down, and take the comments reviewers give you
into account.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

  parent reply	other threads:[~2025-09-18 10:01 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-18  6:23 [PATCH v5 0/7] arm64: add R8A78000 support Kuninori Morimoto
2025-09-18  6:25 ` [PATCH v5 1/7] dt-bindings: serial: sh-sci: don't required "reset" for r8a78000 Kuninori Morimoto
2025-09-18  9:19   ` Geert Uytterhoeven
2025-09-18  6:26 ` [PATCH v5 2/7] dt-bindings: serial: sh-sci: don't required "power-domain" Kuninori Morimoto
2025-09-18  9:26   ` Geert Uytterhoeven
2025-09-18  6:26 ` [PATCH v5 3/7] tools: arm64: Add Cortex-A720AE definitions Kuninori Morimoto
2025-09-18 10:37   ` Will Deacon
2025-09-18  6:26 ` [PATCH v5 4/7] arm64: cputype: " Kuninori Morimoto
2025-09-18 10:46   ` Mark Rutland
2025-09-18  6:27 ` [PATCH v5 5/7] arm64: errata: Expand speculative SSBS workaround for Cortex-A720AE Kuninori Morimoto
2025-09-18 10:49   ` Mark Rutland
2025-09-18  6:27 ` [PATCH v5 6/7] arm64: dts: renesas: Add R8A78000 X5H DTs Kuninori Morimoto
2025-09-18  9:53   ` Geert Uytterhoeven
2025-09-18 10:01   ` Marc Zyngier [this message]
2025-09-19  6:52     ` Geert Uytterhoeven
2025-09-19  8:33       ` Marc Zyngier
2025-09-23 23:56         ` Kuninori Morimoto
2025-09-24  9:37           ` Marc Zyngier
2025-09-18  6:27 ` [PATCH v5 7/7] arm64: dts: renesas: R8A78000: Add initial Ironhide support Kuninori Morimoto
2025-09-18 10:01   ` Geert Uytterhoeven
2025-09-18 11:06 ` [PATCH v5 0/7] arm64: add R8A78000 support Will Deacon

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