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From: Marc Zyngier <maz@kernel.org>
To: "Rob Herring (Arm)" <robh@kernel.org>
Cc: Russell King <linux@armlinux.org.uk>,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Namhyung Kim <namhyung@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>, Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Will Deacon <will@kernel.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	James Clark <james.clark@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
	kvmarm@lists.linux.dev
Subject: Re: [PATCH v2 06/12] perf: arm_pmu: Remove event index to counter remapping
Date: Thu, 27 Jun 2024 12:05:23 +0100	[thread overview]
Message-ID: <86ikxuir2k.wl-maz@kernel.org> (raw)
In-Reply-To: <20240626-arm-pmu-3-9-icntr-v2-6-c9784b4f4065@kernel.org>

On Wed, 26 Jun 2024 23:32:30 +0100,
"Rob Herring (Arm)" <robh@kernel.org> wrote:
> 
> Xscale and Armv6 PMUs defined the cycle counter at 0 and event counters
> starting at 1 and had 1:1 event index to counter numbering. On Armv7 and
> later, this changed the cycle counter to 31 and event counters start at
> 0. The drivers for Armv7 and PMUv3 kept the old event index numbering
> and introduced an event index to counter conversion. The conversion uses
> masking to convert from event index to a counter number. This operation
> relies on having at most 32 counters so that the cycle counter index 0
> can be transformed to counter number 31.
> 
> Armv9.4 adds support for an additional fixed function counter
> (instructions) which increases possible counters to more than 32, and
> the conversion won't work anymore as a simple subtract and mask. The
> primary reason for the translation (other than history) seems to be to
> have a contiguous mask of counters 0-N. Keeping that would result in
> more complicated index to counter conversions. Instead, store a mask of
> available counters rather than just number of events. That provides more
> information in addition to the number of events.
> 
> No (intended) functional changes.
> 
> Signed-off-by: Rob Herring (Arm) <robh@kernel.org>

[...]

> diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h
> index b3b34f6670cf..e5d6d204beab 100644
> --- a/include/linux/perf/arm_pmu.h
> +++ b/include/linux/perf/arm_pmu.h
> @@ -96,7 +96,7 @@ struct arm_pmu {
>  	void		(*stop)(struct arm_pmu *);
>  	void		(*reset)(void *);
>  	int		(*map_event)(struct perf_event *event);
> -	int		num_events;
> +	DECLARE_BITMAP(cntr_mask, ARMPMU_MAX_HWEVENTS);

I'm slightly worried by this, as this size is never used, let alone
checked by the individual drivers. I can perfectly picture some new
(non-architectural) PMU driver having more counters than that, and
blindly setting bits outside of the allowed range.

One way to make it a bit safer would be to add a helper replacing the
various bitmap_set() calls, and enforcing that we never overflow this
bitmap.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2024-06-27 11:05 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-26 22:32 [PATCH v2 00/12] arm64: Add support for Armv9.4 PMU fixed instruction counter Rob Herring (Arm)
2024-06-26 22:32 ` [PATCH v2 01/12] perf: arm_pmuv3: Avoid assigning fixed cycle counter with threshold Rob Herring (Arm)
2024-07-01 17:09   ` Mark Rutland
2024-06-26 22:32 ` [PATCH v2 02/12] perf: arm_pmuv3: Drop unnecessary IS_ENABLED(CONFIG_ARM64) check Rob Herring (Arm)
2024-07-01 17:11   ` Mark Rutland
2024-06-26 22:32 ` [PATCH v2 03/12] perf/arm: Move 32-bit PMU drivers to drivers/perf/ Rob Herring (Arm)
2024-06-26 22:32 ` [PATCH v2 04/12] perf: arm_v6/7_pmu: Drop non-DT probe support Rob Herring (Arm)
2024-06-26 22:32 ` [PATCH v2 05/12] perf: arm_pmuv3: Include asm/arm_pmuv3.h from linux/perf/arm_pmuv3.h Rob Herring (Arm)
2024-06-26 22:32 ` [PATCH v2 06/12] perf: arm_pmu: Remove event index to counter remapping Rob Herring (Arm)
2024-06-27 11:05   ` Marc Zyngier [this message]
2024-07-01 13:52     ` Will Deacon
2024-07-01 15:32       ` Mark Rutland
2024-07-01 15:49       ` Rob Herring
2024-07-02 16:19         ` Will Deacon
2024-07-01 17:06   ` Mark Rutland
2024-06-26 22:32 ` [PATCH v2 07/12] perf: arm_pmuv3: Prepare for more than 32 counters Rob Herring (Arm)
2024-06-26 22:32 ` [PATCH v2 08/12] KVM: arm64: pmu: Use arm_pmuv3.h register accessors Rob Herring (Arm)
2024-06-27 10:47   ` Marc Zyngier
2024-06-26 22:32 ` [PATCH v2 09/12] KVM: arm64: pmu: Use generated define for PMSELR_EL0.SEL access Rob Herring (Arm)
2024-06-27 10:47   ` Marc Zyngier
2024-06-26 22:32 ` [PATCH v2 10/12] arm64: perf/kvm: Use a common PMU cycle counter define Rob Herring (Arm)
2024-06-27 10:48   ` Marc Zyngier
2024-07-01 17:07   ` Mark Rutland
2024-06-26 22:32 ` [PATCH v2 11/12] KVM: arm64: Refine PMU defines for number of counters Rob Herring (Arm)
2024-06-27 10:54   ` Marc Zyngier
2024-06-26 22:32 ` [PATCH v2 12/12] perf: arm_pmuv3: Add support for Armv9.4 PMU instruction counter Rob Herring (Arm)
2024-07-01 17:20   ` Mark Rutland
2024-07-03 14:38 ` [PATCH v2 00/12] arm64: Add support for Armv9.4 PMU fixed " Will Deacon
2024-07-10 12:36   ` Will Deacon

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