From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D4EECA0ECA for ; Tue, 12 Sep 2023 12:43:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235201AbjILMoB (ORCPT ); Tue, 12 Sep 2023 08:44:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60964 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231248AbjILMoA (ORCPT ); Tue, 12 Sep 2023 08:44:00 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6B76F9F; Tue, 12 Sep 2023 05:43:56 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 092B0C433C7; Tue, 12 Sep 2023 12:43:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1694522636; bh=vDRcqUDqXbFXurXPW7gwG53pXOp3uFkEpLpaY//XLWw=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=eS3rQfqFviXYu+moVkZOlwmkwVPzUvcKYZ6kmQqhBUWYHE/xjCAQ7CXO2N5uVxw4W +2NFYlBY9p3u3wuCAMoi93ZDa3HnNJpp/LL0ho1Z3ZBeDFSm5h2OZZXbt7i6lLwHir N63GSMMd0zM7AJIwua+0xGV2eQAxPdHIGR/jYq141Q20Jn/J/O+F11DumpRi/gychQ 7UrKCfdDb9LNb1xBIXtLn5fvcodVm7sTf1NRD61uc9+Q4jyJPsNbEhRg0O9Sp1HMnR hNqZxJ2MQWNbGz+DrdBXWSFfcbnQHrYhZaWA5g/G+p+Yt7/r7Q0nOoBCXyZRFS/bRT tFg1/wPUaidWQ== Received: from [104.132.96.100] (helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qg2kC-00CGSX-R9; Tue, 12 Sep 2023 13:43:53 +0100 Date: Tue, 12 Sep 2023 13:43:44 +0100 Message-ID: <87il8f4l4v.wl-maz@kernel.org> From: Marc Zyngier To: Douglas Anderson Cc: Mark Rutland , Catalin Marinas , Will Deacon , Sumit Garg , Daniel Thompson , linux-arm-kernel@lists.infradead.org, "Rafael J . Wysocki" , Lecopzer Chen , Chen-Yu Tsai , Tomohiro Misono , Peter Zijlstra , Masayoshi Mizuma , Stephane Eranian , Ard Biesheuvel , kgdb-bugreport@lists.sourceforge.net, Stephen Boyd , linux-perf-users@vger.kernel.org, Thomas Gleixner , ito-yuichi@fujitsu.com, Chen-Yu Tsai , linux-kernel@vger.kernel.org Subject: Re: [PATCH v13 1/7] irqchip/gic-v3: Enable support for SGIs to act as NMIs In-Reply-To: <20230906090246.v13.1.I1223c11c88937bd0cbd9b086d4ef216985797302@changeid> References: <20230906160505.2431857-1-dianders@chromium.org> <20230906090246.v13.1.I1223c11c88937bd0cbd9b086d4ef216985797302@changeid> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 104.132.96.100 X-SA-Exim-Rcpt-To: dianders@chromium.org, mark.rutland@arm.com, catalin.marinas@arm.com, will@kernel.org, sumit.garg@linaro.org, daniel.thompson@linaro.org, linux-arm-kernel@lists.infradead.org, rafael.j.wysocki@intel.com, lecopzer.chen@mediatek.com, wens@csie.org, misono.tomohiro@fujitsu.com, peterz@infradead.org, msys.mizuma@gmail.com, eranian@google.com, ardb@kernel.org, kgdb-bugreport@lists.sourceforge.net, swboyd@chromium.org, linux-perf-users@vger.kernel.org, tglx@linutronix.de, ito-yuichi@fujitsu.com, wenst@chromium.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-perf-users@vger.kernel.org On Wed, 06 Sep 2023 17:02:56 +0100, Douglas Anderson wrote: > > As of commit 6abbd6988971 ("irqchip/gic, gic-v3: Make SGIs use > handle_percpu_devid_irq()") SGIs are treated the same as PPIs/EPPIs > and use handle_percpu_devid_irq() by default. Unfortunately, > handle_percpu_devid_irq() isn't NMI safe, and so to run in an NMI > context those should use handle_percpu_devid_fasteoi_nmi(). > > In order to accomplish this, we just have to make room for SGIs in the > array of refcounts that keeps track of which interrupts are set as > NMI. We also rename the array and create a new indexing scheme that > accounts for SGIs. > > Also, enable NMI support prior to gic_smp_init() as allocation of SGIs > as IRQs/NMIs happen as part of this routine. > > Co-developed-by: Sumit Garg > Signed-off-by: Sumit Garg > Acked-by: Mark Rutland > Tested-by: Chen-Yu Tsai > Signed-off-by: Douglas Anderson Acked-by: Marc Zyngier M. -- Without deviation from the norm, progress is not possible.