From: "Liao, Chang" <liaochang1@huawei.com>
To: <andrii@kernel.org>
Cc: <linux-kernel@vger.kernel.org>,
<linux-trace-kernel@vger.kernel.org>,
<linux-perf-users@vger.kernel.org>, <bpf@vger.kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Peter Zijlstra <peterz@infradead.org>,
Oleg Nesterov <oleg@redhat.com>,
Masami Hiramatsu <mhiramat@kernel.org>
Subject: Re: [PATCH v2] uprobes: Improve the usage of xol slots for better scalability
Date: Wed, 6 Nov 2024 17:12:36 +0800 [thread overview]
Message-ID: <8bcc6d5b-08d6-48a8-99d2-d8bb2bef2d6c@huawei.com> (raw)
In-Reply-To: <20240927094549.3382916-1-liaochang1@huawei.com>
在 2024/9/27 17:45, Liao Chang 写道:
>> 2 files changed, 139 insertions(+), 42 deletions(-)
>>
> Liao,
>
> Assuming your ARM64 improvements go through, would you still need
> these changes? XOL case is a slow case and if possible should be
> avoided at all costs. If all common cases for ARM64 are covered
> through instruction emulation, would we need to add all this
> complexity to optimize slow case?
Andrii,
I've studied the optimizations merged over the past month, it seems
that part of the problem addressed in this patch has been resolved
by Oleg(uprobes: kill xol_area->slot_count). And I hope you've received
the email with the re-run results for -push using simulated STP on
the latest kernel (tag next-20241104). It show significant improvements,
althought there's still room to match the throughput of -nop and -ret.
So based on these results, I would prioritize the STP simulation patch.
--
BR
Liao, Chang
next prev parent reply other threads:[~2024-11-06 9:12 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-27 9:45 [PATCH v2] uprobes: Improve the usage of xol slots for better scalability Liao Chang
2024-09-27 17:18 ` Oleg Nesterov
2024-10-21 12:03 ` Liao, Chang
2024-09-30 21:04 ` Andrii Nakryiko
2024-10-01 14:29 ` Oleg Nesterov
2024-10-21 12:08 ` Liao, Chang
2024-11-06 9:12 ` Liao, Chang [this message]
2024-11-06 16:27 ` Andrii Nakryiko
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