* [PATCH 2/2] perf/x86/intel/cstate: Add Pantherlake support
2025-06-25 1:08 [PATCH 1/2] perf/x86/intel/cstate: Remove PC3 support from LunarLake Zhang Rui
@ 2025-06-25 1:08 ` Zhang Rui
2025-06-25 18:48 ` [PATCH 1/2] perf/x86/intel/cstate: Remove PC3 support from LunarLake Liang, Kan
1 sibling, 0 replies; 3+ messages in thread
From: Zhang Rui @ 2025-06-25 1:08 UTC (permalink / raw)
To: peterz
Cc: mingo, tglx, bp, dave.hansen, x86, linux-perf-users, linux-kernel,
ak, kan.liang
Like Lunarlake, Pantherlake supports CC1/CC6/CC7 and PC2/PC6/PC10.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
---
arch/x86/events/intel/cstate.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
index 6f5286a99e0c..369b0d204ff0 100644
--- a/arch/x86/events/intel/cstate.c
+++ b/arch/x86/events/intel/cstate.c
@@ -41,7 +41,7 @@
* MSR_CORE_C1_RES: CORE C1 Residency Counter
* perf code: 0x00
* Available model: SLM,AMT,GLM,CNL,ICX,TNT,ADL,RPL
- * MTL,SRF,GRR,ARL,LNL
+ * MTL,SRF,GRR,ARL,LNL,PTL
* Scope: Core (each processor core has a MSR)
* MSR_CORE_C3_RESIDENCY: CORE C3 Residency Counter
* perf code: 0x01
@@ -53,18 +53,19 @@
* Available model: SLM,AMT,NHM,WSM,SNB,IVB,HSW,BDW,
* SKL,KNL,GLM,CNL,KBL,CML,ICL,ICX,
* TGL,TNT,RKL,ADL,RPL,SPR,MTL,SRF,
- * GRR,ARL,LNL
+ * GRR,ARL,LNL,PTL
* Scope: Core
* MSR_CORE_C7_RESIDENCY: CORE C7 Residency Counter
* perf code: 0x03
* Available model: SNB,IVB,HSW,BDW,SKL,CNL,KBL,CML,
- * ICL,TGL,RKL,ADL,RPL,MTL,ARL,LNL
+ * ICL,TGL,RKL,ADL,RPL,MTL,ARL,LNL,
+ * PTL
* Scope: Core
* MSR_PKG_C2_RESIDENCY: Package C2 Residency Counter.
* perf code: 0x00
* Available model: SNB,IVB,HSW,BDW,SKL,KNL,GLM,CNL,
* KBL,CML,ICL,ICX,TGL,TNT,RKL,ADL,
- * RPL,SPR,MTL,ARL,LNL,SRF
+ * RPL,SPR,MTL,ARL,LNL,SRF,PTL
* Scope: Package (physical package)
* MSR_PKG_C3_RESIDENCY: Package C3 Residency Counter.
* perf code: 0x01
@@ -77,7 +78,7 @@
* Available model: SLM,AMT,NHM,WSM,SNB,IVB,HSW,BDW,
* SKL,KNL,GLM,CNL,KBL,CML,ICL,ICX,
* TGL,TNT,RKL,ADL,RPL,SPR,MTL,SRF,
- * ARL,LNL
+ * ARL,LNL,PTL
* Scope: Package (physical package)
* MSR_PKG_C7_RESIDENCY: Package C7 Residency Counter.
* perf code: 0x03
@@ -96,7 +97,7 @@
* MSR_PKG_C10_RESIDENCY: Package C10 Residency Counter.
* perf code: 0x06
* Available model: HSW ULT,KBL,GLM,CNL,CML,ICL,TGL,
- * TNT,RKL,ADL,RPL,MTL,ARL,LNL
+ * TNT,RKL,ADL,RPL,MTL,ARL,LNL,PTL
* Scope: Package (physical package)
* MSR_MODULE_C6_RES_MS: Module C6 Residency Counter.
* perf code: 0x00
@@ -651,6 +652,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
X86_MATCH_VFM(INTEL_ARROWLAKE_H, &adl_cstates),
X86_MATCH_VFM(INTEL_ARROWLAKE_U, &adl_cstates),
X86_MATCH_VFM(INTEL_LUNARLAKE_M, &lnl_cstates),
+ X86_MATCH_VFM(INTEL_PANTHERLAKE_L, &lnl_cstates),
{ },
};
MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match);
--
2.43.0
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH 1/2] perf/x86/intel/cstate: Remove PC3 support from LunarLake
2025-06-25 1:08 [PATCH 1/2] perf/x86/intel/cstate: Remove PC3 support from LunarLake Zhang Rui
2025-06-25 1:08 ` [PATCH 2/2] perf/x86/intel/cstate: Add Pantherlake support Zhang Rui
@ 2025-06-25 18:48 ` Liang, Kan
1 sibling, 0 replies; 3+ messages in thread
From: Liang, Kan @ 2025-06-25 18:48 UTC (permalink / raw)
To: Zhang Rui, peterz
Cc: mingo, tglx, bp, dave.hansen, x86, linux-perf-users, linux-kernel,
ak
On 2025-06-24 9:08 p.m., Zhang Rui wrote:
> LunarLake doesn't support Package C3. Remove the PC3 residency counter
> support from LunarLake.
>
> Fixes: 26579860fbd5 ("perf/x86/intel/cstate: Add Lunarlake support")
> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
For the series,
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Thanks,
Kan
> ---
> arch/x86/events/intel/cstate.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
> index ec753e39b007..6f5286a99e0c 100644
> --- a/arch/x86/events/intel/cstate.c
> +++ b/arch/x86/events/intel/cstate.c
> @@ -70,7 +70,7 @@
> * perf code: 0x01
> * Available model: NHM,WSM,SNB,IVB,HSW,BDW,SKL,KNL,
> * GLM,CNL,KBL,CML,ICL,TGL,TNT,RKL,
> - * ADL,RPL,MTL,ARL,LNL
> + * ADL,RPL,MTL,ARL
> * Scope: Package (physical package)
> * MSR_PKG_C6_RESIDENCY: Package C6 Residency Counter.
> * perf code: 0x02
> @@ -522,7 +522,6 @@ static const struct cstate_model lnl_cstates __initconst = {
> BIT(PERF_CSTATE_CORE_C7_RES),
>
> .pkg_events = BIT(PERF_CSTATE_PKG_C2_RES) |
> - BIT(PERF_CSTATE_PKG_C3_RES) |
> BIT(PERF_CSTATE_PKG_C6_RES) |
> BIT(PERF_CSTATE_PKG_C10_RES),
> };
^ permalink raw reply [flat|nested] 3+ messages in thread