messages from 2026-06-22 08:04:46 to 2026-06-22 15:24:42 UTC [more...]
[RFC PATCH 0/2] damo: support perf event configuration
2026-06-22 15:24 UTC (4+ messages)
` [RFC PATCH 1/2] perf python: Add access to various members of evsel
` [RFC PATCH 2/2] damo: add --perf_event option
[RFC][PATCH] perf: Fix perf_addr_filters_afjust()
2026-06-22 12:53 UTC (2+ messages)
[PATCH perf] perf: Fix btf_vlen() signedness errors
2026-06-22 11:31 UTC (6+ messages)
[PATCH v3 0/7] Prepare mutable list iterators to cache cursor state
2026-06-22 11:27 UTC (9+ messages)
` [PATCH v3 1/7] list: Add mutable iterator variants
[PATCH v1] perf pmu: Recognize default_core as a core PMU in more places
2026-06-22 9:11 UTC (2+ messages)
[PATCH v7 00/22] Add Counter delegation ISA extension support
2026-06-22 8:39 UTC (34+ messages)
` [PATCH v7 01/22] RISC-V: perf: fix resource cleanup on driver probe failure
` [PATCH v7 03/22] RISC-V: Add Sxcsrind ISA extension definition and parsing
` [PATCH v7 04/22] dt-bindings: riscv: add Sxcsrind ISA extension description
` [PATCH v7 05/22] RISC-V: Define indirect CSR access helpers
` [PATCH v7 06/22] RISC-V: Add Smcntrpmf extension parsing
` [PATCH v7 07/22] dt-bindings: riscv: add Smcntrpmf ISA extension description
` [PATCH v7 08/22] RISC-V: Add Sscfg extension CSR definition
` [PATCH v7 09/22] RISC-V: Add Ssccfg/Smcdeleg ISA extension definition and parsing
` [PATCH v7 10/22] dt-bindings: riscv: add Counter delegation ISA extensions description
` [PATCH v7 11/22] RISC-V: perf: Restructure the SBI PMU code
` [PATCH v7 12/22] RISC-V: perf: Modify the counter discovery mechanism
` [PATCH v7 13/22] RISC-V: perf: Add a mechanism to defined legacy event encoding
` [PATCH v7 14/22] RISC-V: perf: Implement supervisor counter delegation support
` [PATCH v7 15/22] RISC-V: perf: Skip PMU SBI extension when not implemented
` [PATCH v7 16/22] RISC-V: perf: Use config2/vendor table for event to counter mapping
` [PATCH v7 17/22] RISC-V: perf: Add legacy event encodings via sysfs
` [PATCH v7 18/22] RISC-V: perf: Add Qemu virt machine events
` [PATCH v7 19/22] tools/perf: Support event code for arch standard events
` [PATCH v7 20/22] tools/perf: Add RISC-V CounterIDMask event field
` [PATCH v7 21/22] TEST(do-not-upstream): fake qemu-virt PMU events for cdeleg counter-mask testing
` [PATCH v7 22/22] TEST(do-not-upstream): fake qemu vendor JSON + mapfile entry for CounterIDMask path
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