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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Cc: "Liang, Kan" <kan.liang@linux.intel.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	 Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	 Arnaldo Carvalho de Melo <acme@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	 Conor Dooley <conor+dt@kernel.org>,
	Douglas Anderson <dianders@chromium.org>,
	 Ian Rogers <irogers@google.com>, Ingo Molnar <mingo@redhat.com>,
	 James Clark <james.clark@linaro.org>,
	Jiri Olsa <jolsa@kernel.org>,
	 John Garry <john.g.garry@oracle.com>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Leo Yan <leo.yan@linux.dev>,
	Lorenzo Pieralisi <lpieralisi@kernel.org>,
	 Mark Rutland <mark.rutland@arm.com>,
	Mike Leach <mike.leach@linaro.org>,
	 Namhyung Kim <namhyung@kernel.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	 Peter Zijlstra <peterz@infradead.org>,
	Rob Herring <robh@kernel.org>,
	 Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>,
	Will Deacon <will@kernel.org>,
	 devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	 linux-perf-users@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org,  Marc Zyngier <maz@kernel.org>
Subject: Re: [PATCH v4 5/5] arm64: dts: renesas: R8A78000: Add initial Ironhide support
Date: Wed, 17 Sep 2025 16:58:35 +0200	[thread overview]
Message-ID: <CAMuHMdX=oJqJhXOm6w_65dJHRD3VZyJZUWfHzot5EuZtRB2tZw@mail.gmail.com> (raw)
In-Reply-To: <875xdhabml.wl-kuninori.morimoto.gx@renesas.com>

Hi Morimoto-san,

On Wed, 17 Sept 2025 at 07:31, Kuninori Morimoto
<kuninori.morimoto.gx@renesas.com> wrote:
> From: Hai Pham <hai.pham.ud@renesas.com>
>
> Add the initial support for Renesas X5H Ironhide board.
>
> Note: It is using "maxcpus" in bootargs to limit number of CPU, because
> SMP support is now under development. This limitation will be removed
> in the future.
>
> [Kuninori: tidyup for upstreaming]
>
> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
> Signed-off-by: Vinh Nguyen <vinh.nguyen.xz@renesas.com>
> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
> Signed-off-by: Khanh Le <khanh.le.xr@renesas.com>
> Signed-off-by: Huy Bui <huy.bui.wm@renesas.com>
> Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

Thanks for the update!

> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/r8a78000-ironhide.dts
> @@ -0,0 +1,92 @@
> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +/*
> + * Device Tree Source for the Ironhide board
> + *
> + * Copyright (C) 2025 Renesas Electronics Corp.
> + */
> +
> +/dts-v1/;
> +#include "r8a78000.dtsi"
> +
> +/ {
> +       model = "Renesas Ironhide board based on r8a78000";
> +       compatible = "renesas,ironhide", "renesas,r8a78000";
> +
> +       aliases {
> +               serial0 = &hscif0;
> +       };
> +
> +       chosen {
> +               /*
> +                * REMOVE-ME
> +                *
> +                * It works 1 CPU core only for now. This limitation will be
> +                * removed in future.
> +                */
> +               bootargs = "maxcpus=1";

I still don't fully understand why this is needed: without that line,
Ironhide boots fine, and only a single CPU is enabled.
None of the cpu node have an enable-method, so Linux does not try to
enable secondary CPUs anyway.  Even with the enable-method re-added
(like in your v2), Linux cannot enable secondary CPUs, as there is no
PSCI node.

What am I missing?

> +               stdout-path = "serial0:1843200n8";
> +       };

The rest LGTM.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

  reply	other threads:[~2025-09-17 15:06 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-17  5:29 [PATCH v4 0/5] arm64: add R8A78000 support Kuninori Morimoto
2025-09-17  5:30 ` [PATCH v4 1/5] arm64: cputype: Add Cortex-A725AE definitions Kuninori Morimoto
2025-09-17  5:30 ` Kuninori Morimoto
2025-09-17 11:59   ` Will Deacon
2025-09-18  4:54     ` Kuninori Morimoto
2025-09-17  5:30 ` [PATCH v4 2/5] arm64: errata: Expand speculative SSBS workaround for Cortex-A725AE Kuninori Morimoto
2025-09-17  5:31 ` [PATCH v4 3/5] tools: arm64: Add Cortex-A725AE definitions Kuninori Morimoto
2025-09-17  5:31 ` [PATCH v4 4/5] arm64: dts: renesas: Add R8A78000 X5H DTs Kuninori Morimoto
2025-09-17 15:13   ` Geert Uytterhoeven
2025-09-17  5:31 ` [PATCH v4 5/5] arm64: dts: renesas: R8A78000: Add initial Ironhide support Kuninori Morimoto
2025-09-17 14:58   ` Geert Uytterhoeven [this message]
2025-09-18  0:39 ` [PATCH v4 0/5] arm64: add R8A78000 support Rob Herring (Arm)

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