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From: Atish Patra <atishp@atishpatra.org>
To: Andrew Jones <ajones@ventanamicro.com>
Cc: Alexandre Ghiti <alexghiti@rivosinc.com>,
	Jonathan Corbet <corbet@lwn.net>,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
	Ian Rogers <irogers@google.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <anup@brainfault.org>, Will Deacon <will@kernel.org>,
	Rob Herring <robh@kernel.org>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-perf-users@vger.kernel.org,
	linux-riscv@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v2 02/10] include: riscv: Fix wrong include guard in riscv_pmu.h
Date: Thu, 15 Jun 2023 01:36:14 -0700	[thread overview]
Message-ID: <CAOnJCUJHMt4ziauJw-O5vr1NohaSDpN=NQUoSC4oxHRurkV0JQ@mail.gmail.com> (raw)
In-Reply-To: <20230531-707d254be1238272fb2c182d@orel>

On Wed, May 31, 2023 at 6:56 AM Andrew Jones <ajones@ventanamicro.com> wrote:
>
> On Fri, May 12, 2023 at 10:53:13AM +0200, Alexandre Ghiti wrote:
> > The current include guard prevents the inclusion of asm/perf_event.h
> > which uses the same include guard: fix the one in riscv_pmu.h so that it
> > matches the file name.
> >
> > Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > ---
> >  include/linux/perf/riscv_pmu.h | 6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/include/linux/perf/riscv_pmu.h b/include/linux/perf/riscv_pmu.h
> > index 43fc892aa7d9..9f70d94942e0 100644
> > --- a/include/linux/perf/riscv_pmu.h
> > +++ b/include/linux/perf/riscv_pmu.h
> > @@ -6,8 +6,8 @@
> >   *
> >   */
> >
> > -#ifndef _ASM_RISCV_PERF_EVENT_H
> > -#define _ASM_RISCV_PERF_EVENT_H
> > +#ifndef _RISCV_PMU_H
> > +#define _RISCV_PMU_H
> >
> >  #include <linux/perf_event.h>
> >  #include <linux/ptrace.h>
> > @@ -81,4 +81,4 @@ int riscv_pmu_get_hpm_info(u32 *hw_ctr_width, u32 *num_hw_ctr);
> >
> >  #endif /* CONFIG_RISCV_PMU */
> >
> > -#endif /* _ASM_RISCV_PERF_EVENT_H */
> > +#endif /* _RISCV_PMU_H */
> > --
> > 2.37.2
> >
>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>


Reviewed-by: Atish Patra <atishp@rivosinc.com>

-- 
Regards,
Atish

  reply	other threads:[~2023-06-15  8:37 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-12  8:53 [PATCH v2 00/10] riscv: Allow userspace to directly access perf counters Alexandre Ghiti
2023-05-12  8:53 ` [PATCH v2 01/10] perf: Fix wrong comment about default event_idx Alexandre Ghiti
2023-05-31 13:54   ` Andrew Jones
2023-06-15  7:10     ` Alexandre Ghiti
2023-06-15  8:24       ` Atish Patra
2023-05-12  8:53 ` [PATCH v2 02/10] include: riscv: Fix wrong include guard in riscv_pmu.h Alexandre Ghiti
2023-05-31 13:56   ` Andrew Jones
2023-06-15  8:36     ` Atish Patra [this message]
2023-05-12  8:53 ` [PATCH v2 03/10] riscv: Make legacy counter enum match the HW numbering Alexandre Ghiti
2023-05-31 14:01   ` Andrew Jones
2023-06-15  7:16     ` Alexandre Ghiti
2023-05-12  8:53 ` [PATCH v2 04/10] drivers: perf: Rename riscv pmu driver Alexandre Ghiti
2023-05-31 14:09   ` Andrew Jones
2023-06-15  7:25     ` Alexandre Ghiti
2023-06-15  8:34       ` Atish Patra
2023-05-12  8:53 ` [PATCH v2 05/10] riscv: Prepare for user-space perf event mmap support Alexandre Ghiti
2023-05-31 14:24   ` Andrew Jones
2023-06-16  8:28   ` Atish Patra
2023-06-16  8:56     ` Alexandre Ghiti
2023-06-20 15:27       ` Atish Patra
2023-05-12  8:53 ` [PATCH v2 06/10] drivers: perf: Implement perf event mmap support in the legacy backend Alexandre Ghiti
2023-05-31 14:27   ` Andrew Jones
2023-06-15  7:38     ` Alexandre Ghiti
2023-05-12  8:53 ` [PATCH v2 07/10] drivers: perf: Implement perf event mmap support in the SBI backend Alexandre Ghiti
2023-05-31 15:02   ` Andrew Jones
2023-06-15  8:41     ` Atish Patra
2023-06-15 13:27       ` Heinrich Schuchardt
2023-06-16  7:44         ` Atish Patra
2023-06-15  9:52     ` Alexandre Ghiti
2023-05-12  8:53 ` [PATCH v2 08/10] Documentation: admin-guide: Add riscv sysctl_perf_user_access Alexandre Ghiti
2023-05-31 15:07   ` Andrew Jones
2023-05-31 17:08     ` Atish Patra
2023-06-15 10:00     ` Alexandre Ghiti
2023-05-12  8:53 ` [PATCH v2 09/10] tools: lib: perf: Implement riscv mmap support Alexandre Ghiti
2023-05-31 15:12   ` Andrew Jones
2023-06-16  8:43   ` Atish Patra
2023-06-16  9:06     ` Alexandre Ghiti
2023-06-19 19:04       ` Atish Patra
2023-05-12  8:53 ` [PATCH v2 10/10] perf: tests: Adapt mmap-basic.c for riscv Alexandre Ghiti
2023-05-31 15:15   ` Andrew Jones
2023-06-05 13:53     ` Arnaldo Carvalho de Melo
2023-06-05 14:02       ` Alexandre Ghiti
     [not found]       ` <CAHVXubhofC+WaSysWaxcTA2GdJAF8kTD3COBeQDAy25af_rSLg@mail.gmail.com>
2023-06-05 14:31         ` Arnaldo Carvalho de Melo
2023-06-15 10:02     ` Alexandre Ghiti
2023-05-15 17:50 ` [PATCH v2 00/10] riscv: Allow userspace to directly access perf counters Conor Dooley
2023-06-21 23:37 ` Palmer Dabbelt

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