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Fri, 14 Jul 2023 01:03:41 -0700 (PDT) MIME-Version: 1.0 References: <20230703124647.215952-1-alexghiti@rivosinc.com> <20230703124647.215952-7-alexghiti@rivosinc.com> In-Reply-To: <20230703124647.215952-7-alexghiti@rivosinc.com> From: Atish Patra Date: Fri, 14 Jul 2023 01:03:29 -0700 Message-ID: Subject: Re: [PATCH v4 06/10] drivers: perf: Implement perf event mmap support in the legacy backend To: Alexandre Ghiti Cc: Jonathan Corbet , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Paul Walmsley , Palmer Dabbelt , Albert Ou , Anup Patel , Will Deacon , Rob Herring , Andrew Jones , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-perf-users@vger.kernel.org On Mon, Jul 3, 2023 at 5:52=E2=80=AFAM Alexandre Ghiti wrote: > > Implement the needed callbacks in the legacy driver so that we can > directly access the counters through perf in userspace. > > Signed-off-by: Alexandre Ghiti > Reviewed-by: Andrew Jones > --- > drivers/perf/riscv_pmu_legacy.c | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_leg= acy.c > index 6a000abc28bb..79fdd667922e 100644 > --- a/drivers/perf/riscv_pmu_legacy.c > +++ b/drivers/perf/riscv_pmu_legacy.c > @@ -71,6 +71,29 @@ static void pmu_legacy_ctr_start(struct perf_event *ev= ent, u64 ival) > local64_set(&hwc->prev_count, initial_val); > } > > +static uint8_t pmu_legacy_csr_index(struct perf_event *event) > +{ > + return event->hw.idx; > +} > + > +static void pmu_legacy_event_mapped(struct perf_event *event, struct mm_= struct *mm) > +{ > + if (event->attr.config !=3D PERF_COUNT_HW_CPU_CYCLES && > + event->attr.config !=3D PERF_COUNT_HW_INSTRUCTIONS) > + return; > + > + event->hw.flags |=3D PERF_EVENT_FLAG_USER_READ_CNT; > +} > + > +static void pmu_legacy_event_unmapped(struct perf_event *event, struct m= m_struct *mm) > +{ > + if (event->attr.config !=3D PERF_COUNT_HW_CPU_CYCLES && > + event->attr.config !=3D PERF_COUNT_HW_INSTRUCTIONS) > + return; > + > + event->hw.flags &=3D ~PERF_EVENT_FLAG_USER_READ_CNT; > +} > + > /* > * This is just a simple implementation to allow legacy implementations > * compatible with new RISC-V PMU driver framework. > @@ -91,6 +114,9 @@ static void pmu_legacy_init(struct riscv_pmu *pmu) > pmu->ctr_get_width =3D NULL; > pmu->ctr_clear_idx =3D NULL; > pmu->ctr_read =3D pmu_legacy_read_ctr; > + pmu->event_mapped =3D pmu_legacy_event_mapped; > + pmu->event_unmapped =3D pmu_legacy_event_unmapped; > + pmu->csr_index =3D pmu_legacy_csr_index; > > perf_pmu_register(&pmu->pmu, "cpu", PERF_TYPE_RAW); > } > -- > 2.39.2 > Reviewed-by: Atish Patra --=20 Regards, Atish