From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="IH6VgV1t" Received: from mail-ed1-x52f.google.com (mail-ed1-x52f.google.com [IPv6:2a00:1450:4864:20::52f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 707C9C3 for ; Mon, 11 Dec 2023 09:24:03 -0800 (PST) Received: by mail-ed1-x52f.google.com with SMTP id 4fb4d7f45d1cf-54744e66d27so16210a12.0 for ; Mon, 11 Dec 2023 09:24:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1702315442; x=1702920242; darn=vger.kernel.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=fa+2d1g1YuhXldTtmH+vTSWA87IfsVeC6viX1KyDnNc=; b=IH6VgV1t7720oExKmHhIOSizTbPv2rYrxJYZDqh3Uk/P20ewkb7oGKJzaq22FLLRFg o0T0dWQtTpQdOCYWQZo0o101wcxmTLivoEm/DH9BSDM7i5bjaz4bqeODhmq3XJLRqkgN dhtT3rOrpLNlySLwKPsZkq5mIOvP94cql5zAPHU0XIiuMFt802yc095rCDKVtrn5d0rO Iu7J8sRpd5o0Fq46cK3N5DU76IVMhdm7YBq5RAoFoXxdUnhHcNR9iuFO89XI5W3s/Efv Jw8PJG+vxvpz+Da+yymrfN1OBHBFXuc4VGX4Ys11BoUmVYlZBD/HZCc160+L5hHgiSYv uNbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702315442; x=1702920242; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fa+2d1g1YuhXldTtmH+vTSWA87IfsVeC6viX1KyDnNc=; b=JfCY8aID5NNB+l1fY0Qj/1HnRJY51ciLig1GU/vzFc8N03QHfgX6sQyPfRRNfI9aFf Kuw4ktUtGHqgXwx8zKjiHrUW1uqOBJxqORY+JMLyqrxulrRUjnPEa7XBQhXblpnqG287 5tifCe6Fb3HwrdBmeZ4geYhqpT4SKLAbw+CvHMG6kk/iINxZoMjElfnB/2g7Awq63xNB PREiF2nJ0R6Ta2ewnbr3pq8GEu2D0915K9xR3uikWzmp7sHFUqX11FtOZ4/WRVDc1XSj OdzMQ2UOCAdqXMLxcfFf7TjJwgOvX738b/t3kuqMfCYIXsjRrssXLlQK5lgvrRFT6/wz Ohjw== X-Gm-Message-State: AOJu0YwY5iYpW7ciH6CgGx3vd4e6ufsGT2z5XOsdFeWglZxUe9wD6D3h tyY1ST8WIkfYatp66qw1obAYYm+IS0NS+u17Pwk5Rg== X-Google-Smtp-Source: AGHT+IF9+iN+82W54Dm/WqWBY+mutVQMhk2qnAOdPLsLwb824cJcgEvNeaBrjPsYJvv8bdUZEAA5BOW9CrRqjFRm5GM= X-Received: by 2002:a50:c101:0:b0:54b:bf08:a95f with SMTP id l1-20020a50c101000000b0054bbf08a95fmr209926edf.6.1702315441731; Mon, 11 Dec 2023 09:24:01 -0800 (PST) Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <3a8c66ec-537d-4e29-bf08-226dd41b08aa@linux.intel.com> <877clnz4bh.fsf@vuxu.org> In-Reply-To: From: Ian Rogers Date: Mon, 11 Dec 2023 09:23:49 -0800 Message-ID: Subject: Re: 'perf top' broken on intel hybrid systems To: Leah Neukirchen Cc: "Liang, Kan" , LKML , linux-perf-users Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Sat, Dec 9, 2023 at 9:26=E2=80=AFPM Ian Rogers wrot= e: > > On Sat, Dec 9, 2023, 12:14=E2=80=AFPM Leah Neukirchen wro= te: >> >> >> > The error is because the perf top always tries to open an event on the >> > user_requested_cpus, which are all CPUs by default. >> > >> > Something as below should fix it. For hybrid, open a PMU event on an >> > unsupported CPU should be error out. >> > >> > diff --git a/tools/perf/builtin-top.c b/tools/perf/builtin-top.c >> >> This fixes "perf top" on my i7-1355U. It would be great if you could >> get this patch into upstream and stable branches. > > > > I'll try to take a look ASAP. As we don't need this for record there is s= ome existing logic that perf top is clearly missing. We should also have a = test on perf top. So for stat and record there is a call to evlist__create_maps: https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git/tr= ee/tools/perf/builtin-stat.c?h=3Dperf-tools-next#n2730 https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git/tr= ee/tools/perf/builtin-record.c?h=3Dperf-tools-next#n4210 In evlist__create_maps we do perf_evlist__propagate_maps and that will: https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git/tr= ee/tools/lib/perf/evlist.c?h=3Dperf-tools-next#n43 ``` } else if (evlist->has_user_cpus && evsel->is_pmu_core) { /* * User requested CPUs on a core PMU, ensure the requested CPUs * are valid by intersecting with those of the PMU. */ perf_cpu_map__put(evsel->cpus); evsel->cpus =3D perf_cpu_map__intersect(evlist->user_requested_cpus, evsel->own_cpus); ``` I think the fix should be looking to do the same map set up in top as stat and record, presumably there was a refactor and top was overlooked. I'll try to address this and add a basic sanity test of doing a few iterations of perf top on stdio, which would have been sufficient to catch this. Thanks, Ian