From: Arnaldo Carvalho de Melo <acme@kernel.org>
To: "Jin, Yao" <yao.jin@linux.intel.com>
Cc: Ravi Bangoria <ravi.bangoria@amd.com>,
mark.rutland@arm.com, alexander.shishkin@linux.intel.com,
jolsa@redhat.com, namhyung@kernel.org, kim.phillips@amd.com,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/2] perf annotate: Fix fused instr logic for assembly functions
Date: Mon, 13 Sep 2021 16:53:31 -0300 [thread overview]
Message-ID: <YT+sOxJeEplSm2pl@kernel.org> (raw)
In-Reply-To: <211bb79d-80ff-e9b6-1851-1aaed987301d@linux.intel.com>
Em Mon, Sep 13, 2021 at 09:54:00AM +0800, Jin, Yao escreveu:
> Hi Arnaldo, Ravi
>
> On 9/12/2021 3:03 AM, Arnaldo Carvalho de Melo wrote:
> > Em Sat, Sep 11, 2021 at 10:08:53AM +0530, Ravi Bangoria escreveu:
> > > Some x86 microarchitectures fuse a subset of cmp/test/ALU instructions
> > > with branch instructions, and thus perf annotate highlight such valid
> > > pairs as fused.
> >
> > Jin, are you ok with this? Can I have your reviewed-by?
> >
> > - Arnaldo
>
> Oh, my original patch could only handle the case like:
>
> cmp xxx
> je aaa
>
> But it didn't consider Ravi's case something like:
>
> cmp xxx
> cmp yyy
> je aaa
> je bbb
>
> Thanks for Ravi fixing this issue! Backward searching is probably a better solution.
>
> Frankly I can't reproduce Ravi's case, but for my test suite, Ravi's patch works as well.
>
> Reviewed-by: Jin Yao <yao.jin@linux.intel.com>
Thanks, applied.
- Arnaldo
prev parent reply other threads:[~2021-09-13 19:53 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-11 4:38 [PATCH v2 1/2] perf annotate: Fix fused instr logic for assembly functions Ravi Bangoria
2021-09-11 4:38 ` [PATCH v2 2/2] perf annotate: Add fusion logic for AMD microarchs Ravi Bangoria
2021-09-11 19:03 ` [PATCH v2 1/2] perf annotate: Fix fused instr logic for assembly functions Arnaldo Carvalho de Melo
2021-09-13 1:54 ` Jin, Yao
2021-09-13 19:53 ` Arnaldo Carvalho de Melo [this message]
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