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[213.175.37.12]) by smtp.gmail.com with ESMTPSA id o5sm5383038qkl.50.2021.11.14.08.41.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Nov 2021 08:41:47 -0800 (PST) Date: Sun, 14 Nov 2021 17:41:44 +0100 From: Jiri Olsa To: Sandipan Das Cc: acme@kernel.org, ravi.bangoria@amd.com, ananth.narayan@amd.com, kim.phillips@amd.com, rrichter@amd.com, linux-perf-users@vger.kernel.org, namhyung@kernel.org, alexander.shishkin@linux.intel.com, mark.rutland@arm.com Subject: Re: [RFC PATCH] tools/perf/x86: Use alternative format for AMD raw events Message-ID: References: <20211111125646.581021-1-sandipan.das@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211111125646.581021-1-sandipan.das@amd.com> Precedence: bulk List-ID: X-Mailing-List: linux-perf-users@vger.kernel.org On Thu, Nov 11, 2021 at 06:26:46PM +0530, Sandipan Das wrote: SNIP > Before: > > $ sudo perf --debug perf-event-open stat -e ic_tag_hit_miss.all_instruction_cache_accesses sleep 1 > ------------------------------------------------------------ > perf_event_attr: > type 4 > size 128 > config 0x100001f8e > sample_type IDENTIFIER > read_format TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING > disabled 1 > inherit 1 > enable_on_exec 1 > exclude_guest 1 > ------------------------------------------------------------ > [...] > > $ sudo perf --debug perf-event-open stat -e r1f18e sleep 1 > ------------------------------------------------------------ > perf_event_attr: > type 4 > size 128 > config 0x1f18e > sample_type IDENTIFIER > read_format TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING > disabled 1 > inherit 1 > enable_on_exec 1 > exclude_guest 1 > ------------------------------------------------------------ > [...] > > $ sudo perf --debug perf-event-open stat -e r100001f8e sleep 1 > ------------------------------------------------------------ > perf_event_attr: > type 4 > size 128 > config 0x100001f8e > sample_type IDENTIFIER > read_format TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING > disabled 1 > inherit 1 > enable_on_exec 1 > exclude_guest 1 > ------------------------------------------------------------ > [...] > > After: > > $ sudo perf --debug perf-event-open stat -e ic_tag_hit_miss.all_instruction_cache_accesses sleep 1 > ------------------------------------------------------------ > perf_event_attr: > type 4 > size 128 > config 0x100001f8e > sample_type IDENTIFIER > read_format TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING > disabled 1 > inherit 1 > enable_on_exec 1 > exclude_guest 1 > ------------------------------------------------------------ > [...] > > $ sudo perf --debug perf-event-open stat -e r1f18e sleep 1 > ------------------------------------------------------------ > perf_event_attr: > type 4 > size 128 > config 0x100001f8e > sample_type IDENTIFIER > read_format TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING > disabled 1 > inherit 1 > enable_on_exec 1 > exclude_guest 1 > ------------------------------------------------------------ > [...] > > $ sudo perf --debug perf-event-open stat -e r100001f8e sleep 1 > ------------------------------------------------------------ > perf_event_attr: > type 4 > size 128 > config 0x100001f8e > sample_type IDENTIFIER > read_format TOTAL_TIME_ENABLED|TOTAL_TIME_RUNNING > disabled 1 > inherit 1 > enable_on_exec 1 > exclude_guest 1 > ------------------------------------------------------------ > [...] > > It is understandable that raw events must follow the native > PERF_CTL register format but it is worthwhile to pursue such > alternative formats for usability? good question.. I see raw events as a way to put to config whatever the user wants and IMO adding changes/quirks that silently changes config could create confusion and angry users ;-) I'd think that if user is composing/using raw events then using directly r100001f8e is not such a big deal? perhaps there was some some discussion about this that I missed? thanks, jirka > > UUEEE is something that works for the core pmu events. Data > fabric events have a 14-bit EventSelect field and will need > more work. > > $ cat /sys/bus/event_source/devices/amd_df/format/event > config:0-7,32-35,59-60 > > More details on registers and events can be found in the > AMD Processor Programming Reference (PPR). The one relevant > to the EPYC 7713 processor used here can be found at: > > https://bugzilla.kernel.org/attachment.cgi?id=296015 > > Infomration on PERF_CTL MSRs start at page 185 and PMU > events start at page 445. > > Signed-off-by: Sandipan Das SNIP