From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C32EC433EF for ; Tue, 15 Feb 2022 14:53:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234674AbiBOOxy (ORCPT ); Tue, 15 Feb 2022 09:53:54 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:34020 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239492AbiBOOxa (ORCPT ); Tue, 15 Feb 2022 09:53:30 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 911F4102423; Tue, 15 Feb 2022 06:52:46 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 72C1DB819FA; Tue, 15 Feb 2022 14:52:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 17ADDC340EB; Tue, 15 Feb 2022 14:52:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1644936763; bh=oHvI812wnFSZHuTw2mFyGnMQwXFVGo3Bnh6xMpiP8xM=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=jdjq0iQ6XSjhEYl/rI1cMvQa82uF75FAMOBXuy7bNuCfqoEzx0NcmpyeJezq3L7ew URSopB2PK2NyBTFqz0r9jyPK2VTDNfvtCppZSP+t/GCERdYQYdJeqcuUfxQTnisZGk cml/ziTELZQLptSUs5TIbSmtef8xgYwEfUX5FM4xwuEroLXwZLYf6WX9pi+1ywDUuS 9fvEnwP8w+a9j8ocwNXhu3KI8iM3Pwv6bip2xkgj5FfrcDyGIyZDCMd5SlM+GYLRRq iX5V4PuFkYkSFlEBva298QHJEU3lHX8AMH6Y1EMJnWftKenGvzPucWDqwumNzOQtgf JgvPE//08keuw== Received: by quaco.ghostprotocols.net (Postfix, from userid 1000) id C3089400FE; Tue, 15 Feb 2022 11:52:40 -0300 (-03) Date: Tue, 15 Feb 2022 11:52:40 -0300 From: Arnaldo Carvalho de Melo To: Suzuki K Poulose Cc: James Clark , mathieu.poirier@linaro.org, coresight@lists.linaro.org, leo.yan@linaro.com, mike.leach@linaro.org, Leo Yan , John Garry , Will Deacon , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Subject: Re: [PATCH v2 3/6] perf cs-etm: Update deduction of TRCCONFIGR register for branch broadcast Message-ID: References: <20220113091056.1297982-1-james.clark@arm.com> <20220113091056.1297982-4-james.clark@arm.com> <25b85560-dd95-2569-d1bc-872902d6343f@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <25b85560-dd95-2569-d1bc-872902d6343f@arm.com> X-Url: http://acmel.wordpress.com Precedence: bulk List-ID: X-Mailing-List: linux-perf-users@vger.kernel.org Em Fri, Jan 28, 2022 at 11:25:24AM +0000, Suzuki K Poulose escreveu: > On 13/01/2022 09:10, James Clark wrote: > > Now that a config flag for branch broadcast has been added, take it into > > account when trying to deduce what the driver would have programmed the > > TRCCONFIGR register to. Thanks, applied this one, the tools/ part. - Arnaldo > > Reviewed-by: Leo Yan > > Signed-off-by: James Clark > > --- > > tools/include/linux/coresight-pmu.h | 2 ++ > > tools/perf/arch/arm/util/cs-etm.c | 3 +++ > > 2 files changed, 5 insertions(+) > > > > diff --git a/tools/include/linux/coresight-pmu.h b/tools/include/linux/coresight-pmu.h > > index 4ac5c081af93..6c2fd6cc5a98 100644 > > --- a/tools/include/linux/coresight-pmu.h > > +++ b/tools/include/linux/coresight-pmu.h > > @@ -18,6 +18,7 @@ > > * ETMv3.5/PTM doesn't define ETMCR config bits with prefix "ETM3_" and > > * directly use below macros as config bits. > > */ > > +#define ETM_OPT_BRANCH_BROADCAST 8 > > #define ETM_OPT_CYCACC 12 > > #define ETM_OPT_CTXTID 14 > > #define ETM_OPT_CTXTID2 15 > > @@ -25,6 +26,7 @@ > > #define ETM_OPT_RETSTK 29 > > /* ETMv4 CONFIGR programming bits for the ETM OPTs */ > > +#define ETM4_CFG_BIT_BB 3 > > #define ETM4_CFG_BIT_CYCACC 4 > > #define ETM4_CFG_BIT_CTXTID 6 > > #define ETM4_CFG_BIT_VMID 7 > > diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/cs-etm.c > > index 293a23bf8be3..c7ef4e9b4a3a 100644 > > --- a/tools/perf/arch/arm/util/cs-etm.c > > +++ b/tools/perf/arch/arm/util/cs-etm.c > > @@ -527,6 +527,9 @@ static u64 cs_etmv4_get_config(struct auxtrace_record *itr) > > if (config_opts & BIT(ETM_OPT_CTXTID2)) > > config |= BIT(ETM4_CFG_BIT_VMID) | > > BIT(ETM4_CFG_BIT_VMID_OPT); > > + if (config_opts & BIT(ETM_OPT_BRANCH_BROADCAST)) > > + config |= BIT(ETM4_CFG_BIT_BB); > > + > > return config; > > Reviewed-by: Suzuki K Poulose > > > } -- - Arnaldo