From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A80BC25B0D for ; Thu, 11 Aug 2022 13:13:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234420AbiHKNNf (ORCPT ); Thu, 11 Aug 2022 09:13:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54830 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235471AbiHKNNe (ORCPT ); Thu, 11 Aug 2022 09:13:34 -0400 Received: from mail.skyhub.de (mail.skyhub.de [IPv6:2a01:4f8:190:11c2::b:1457]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7B93F6E2EC; Thu, 11 Aug 2022 06:13:33 -0700 (PDT) Received: from zn.tnic (p200300ea971b9854329c23fffea6a903.dip0.t-ipconnect.de [IPv6:2003:ea:971b:9854:329c:23ff:fea6:a903]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id F16601EC059D; Thu, 11 Aug 2022 15:13:27 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1660223608; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=OldGnQzh68j0ria9OKr1ZKpGr6HHRfZ58vsjqVtmBGM=; b=Jom2upwkNnyYk1jgdaBY1cA2U9a1piccWCjIfwQWrzp2t4mYuQKDRlSYFkCHpeu/iUfeQM rFpZxOGA4A+OzHUIwp8pVdVz1VL8nRyYCFZEqjBaEqylpDodbKiCnCKKXkAfKStqXDzwvo CTEWgaPRc9+rgc253wfO5evolOJ5YBU= Date: Thu, 11 Aug 2022 15:13:23 +0200 From: Borislav Petkov To: Sandipan Das Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, x86@kernel.org, peterz@infradead.org, acme@kernel.org, namhyung@kernel.org, jolsa@kernel.org, tglx@linutronix.de, mingo@redhat.com, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, dave.hansen@linux.intel.com, like.xu.linux@gmail.com, eranian@google.com, ananth.narayan@amd.com, ravi.bangoria@amd.com, santosh.shukla@amd.com Subject: Re: [PATCH 04/13] x86/cpufeatures: Add LbrExtV2 feature bit Message-ID: References: <172d2b0df39306ed77221c45ee1aa62e8ae0548d.1660211399.git.sandipan.das@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <172d2b0df39306ed77221c45ee1aa62e8ae0548d.1660211399.git.sandipan.das@amd.com> Precedence: bulk List-ID: X-Mailing-List: linux-perf-users@vger.kernel.org On Thu, Aug 11, 2022 at 05:59:52PM +0530, Sandipan Das wrote: > CPUID leaf 0x80000022 i.e. ExtPerfMonAndDbg advertises some new performance > monitoring features for AMD processors. > > Bit 1 of EAX indicates support for Last Branch Record Extension Version 2 > (LbrExtV2) features. If found to be set during PMU initialization, the EBX > bits of the same leaf can be used to determine the number of available LBR > entries. > > For better utilization of feature words, LbrExtV2 is added as a scattered s/LbrExtV2 is added/add LbrExtV2/ > feature bit. > > Signed-off-by: Sandipan Das > --- > arch/x86/include/asm/cpufeatures.h | 2 +- > arch/x86/kernel/cpu/scattered.c | 1 + > 2 files changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h > index 393f2bbb5e3a..e3fa476a24b0 100644 > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -96,7 +96,7 @@ > #define X86_FEATURE_SYSCALL32 ( 3*32+14) /* "" syscall in IA32 userspace */ > #define X86_FEATURE_SYSENTER32 ( 3*32+15) /* "" sysenter in IA32 userspace */ > #define X86_FEATURE_REP_GOOD ( 3*32+16) /* REP microcode works well */ > -/* FREE! ( 3*32+17) */ > +#define X86_FEATURE_LBREXT_V2 ( 3*32+17) /* AMD Last Branch Record Extension Version 2 */ > #define X86_FEATURE_LFENCE_RDTSC ( 3*32+18) /* "" LFENCE synchronizes RDTSC */ > #define X86_FEATURE_ACC_POWER ( 3*32+19) /* AMD Accumulated Power Mechanism */ > #define X86_FEATURE_NOPL ( 3*32+20) /* The NOPL (0F 1F) instructions */ > diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c > index dbaa8326d6f2..6be46dffddbf 100644 > --- a/arch/x86/kernel/cpu/scattered.c > +++ b/arch/x86/kernel/cpu/scattered.c > @@ -44,6 +44,7 @@ static const struct cpuid_bit cpuid_bits[] = { > { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, > { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, > { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, > + { X86_FEATURE_LBREXT_V2, CPUID_EAX, 1, 0x80000022, 0 }, > { 0, 0, 0, 0, 0 } > }; Other than that: Acked-by: Borislav Petkov -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette