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[58.152.48.222]) by smtp.gmail.com with ESMTPSA id c3-20020a654203000000b0042c0ffa0e62sm9857405pgq.47.2022.09.14.07.27.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Sep 2022 07:27:32 -0700 (PDT) Date: Wed, 14 Sep 2022 22:27:23 +0800 From: Leo Yan To: John Garry Cc: Yicong Yang , acme@kernel.org, peterz@infradead.org, alexander.shishkin@linux.intel.com, james.clark@arm.com, will@kernel.org, mathieu.poirier@linaro.org, mark.rutland@arm.com, suzuki.poulose@arm.com, jonathan.cameron@huawei.com, mike.leach@linaro.org, gregkh@linuxfoundation.org, helgaas@kernel.org, lorenzo.pieralisi@arm.com, shameerali.kolothum.thodi@huawei.com, mingo@redhat.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, linux-perf-users@vger.kernel.org, prime.zeng@huawei.com, zhangshaokun@hisilicon.com, linuxarm@huawei.com, yangyicong@hisilicon.com, liuqi6124@gmail.com Subject: Re: [RESEND PATCH v12 1/3] perf tool: arm: Refactor event list iteration in auxtrace_record__init() Message-ID: References: <20220914075925.48549-1-yangyicong@huawei.com> <20220914075925.48549-2-yangyicong@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-perf-users@vger.kernel.org On Wed, Sep 14, 2022 at 02:47:43PM +0100, John Garry wrote: [...] > > struct auxtrace_record > > *auxtrace_record__init(struct evlist *evlist, int *err) > > { > > - struct perf_pmu *cs_etm_pmu; > > + struct perf_pmu *cs_etm_pmu = NULL; > > + struct perf_pmu **arm_spe_pmus = NULL; > > struct evsel *evsel; > > - bool found_etm = false; > > + struct perf_pmu *found_etm = NULL; > > struct perf_pmu *found_spe = NULL; > > - struct perf_pmu **arm_spe_pmus = NULL; > > + int auxtrace_event_cnt = 0; > > int nr_spes = 0; > > - int i = 0; > > if (!evlist) > > return NULL; > > @@ -68,24 +84,23 @@ struct auxtrace_record > > arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err); > > evlist__for_each_entry(evlist, evsel) { > > - if (cs_etm_pmu && > > - evsel->core.attr.type == cs_etm_pmu->type) > > - found_etm = true; > > - > > - if (!nr_spes || found_spe) > > - continue; > > - > > - for (i = 0; i < nr_spes; i++) { > > - if (evsel->core.attr.type == arm_spe_pmus[i]->type) { > > - found_spe = arm_spe_pmus[i]; > > - break; > > - } > > - } > > + if (cs_etm_pmu && !found_etm) + found_etm = > > find_pmu_for_event(&cs_etm_pmu, 1, evsel); > > + > > + if (arm_spe_pmus && !found_spe) > > + found_spe = find_pmu_for_event(arm_spe_pmus, nr_spes, evsel); > > should you break if found_etm and found_spe are set? Or, indeed, error and > return directly as we do below? Indeed, I am not sure why you even require > auxtrace_event_cnt I think this was my suggestion :) We can check if both 'found_etm' and 'found_spe' are set and directly break (and bail out) for this case. But it would introduce more complex checking if we connect with patch 2 with new flag 'found_ptt', something like: if ((found_etm && found_spe) || (found_etm && found_ptt) || (found_spe && found_ptt)) break; This is hard for later's extension if we need to support a new auxtrace event, so using auxtrace_event_cnt would be easier to extend more auxtrace event on Arm platforms. Thanks, Leo > > } > > + > > free(arm_spe_pmus); > > - if (found_etm && found_spe) { > > - pr_err("Concurrent ARM Coresight ETM and SPE operation not currently supported\n"); > > + if (found_etm) > > + auxtrace_event_cnt++; > > + > > + if (found_spe) > > + auxtrace_event_cnt++; > > + > > + if (auxtrace_event_cnt > 1) { > > + pr_err("Concurrent AUX trace operation not currently supported\n"); > > *err = -EOPNOTSUPP; > > return NULL; > > } >