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Fri, 17 Jan 2025 18:44:05 +0000 Date: Fri, 17 Jan 2025 13:44:02 -0500 From: Rodrigo Vivi To: Lucas De Marchi CC: , Peter Zijlstra , , Vinay Belgaumkar Subject: Re: [PATCH v13 7/7] drm/xe/pmu: Add GT C6 events Message-ID: References: <20250116230718.82460-1-lucas.demarchi@intel.com> <20250116230718.82460-8-lucas.demarchi@intel.com> Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20250116230718.82460-8-lucas.demarchi@intel.com> X-ClientProxiedBy: MN2PR15CA0050.namprd15.prod.outlook.com (2603:10b6:208:237::19) To SN7PR11MB8282.namprd11.prod.outlook.com (2603:10b6:806:269::11) Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN7PR11MB8282:EE_|DM6PR11MB4707:EE_ X-MS-Office365-Filtering-Correlation-Id: be613658-8f38-4a7c-4ee0-08dd3726eb26 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?dFwNf8QCPVJ2+mg8wnU71bqD9YVgj2q+82xGkfEFGLXDlViFQXKN5ZrcKKly?= =?us-ascii?Q?RVwaxmilTIufISH0lyjJfXGLWZ1MiV3qw78zdesbUr+UTewwCMausiFQ854A?= =?us-ascii?Q?TRMunPuM5bkaM0EqN++7xbXT17Tf/8UyfEeKYAWZTpafwew9KT/3hfSzjaWq?= =?us-ascii?Q?nkDpYsF+Z6Di/hRMy72TBRTRhsmpsJ0G6Kkz2S4of3n2UPknDiSwhqUf/KIz?= =?us-ascii?Q?rVAJ6FMTst0IGNEAOHeQITnFMq/tKTSL97/EDtFrvNfpNF93K2Icy+c5KREA?= =?us-ascii?Q?hT9DN8ZVeNycfWtQA6eNbiB1GKIpg5/ovBRSTxpoYdFMPNTy5rOlz8pmVayz?= =?us-ascii?Q?j42ttFJd5z+tYVE342usVxjmR61n5iBOZd2ca61Sp9Ac+tiLut0IvTZ952bX?= =?us-ascii?Q?pIJQbZaPsE9HBfRmEgv6RPtfOCjylVyIf6/s7z8YN9A/GrkW0A5sNDNpJhdt?= =?us-ascii?Q?rg4+fGOpS73jhmF+dDzpGkS6vZg0wkxyUTeuittGlN61c6d7ue/5fwBM9bGw?= =?us-ascii?Q?FoGB2lf8tMeCAHSdPFlDREf69cxRzpCD2Q1ajTOPgFsHPzEPVtYOMLWVUuWh?= =?us-ascii?Q?NWtoslFkqW5DQLJatj/mgqQbXmtRlzWHro/er8MMYJBY04xnh0ta39n/GPIj?= =?us-ascii?Q?FgwafLBFELabSM2uLuPNXpgLpMpYsqIF9Ayr5EtG7/EmMhcODkNoMZN8EIt8?= =?us-ascii?Q?Gvf3xpmjyHKGbGeBo+6eWTdKQE+rd24Gt+hHxG5vOp8VaPbPWxihEIQc+zLv?= =?us-ascii?Q?SWP7MFwfbighzTZ8OAHYXZrpSXP0xdLHSpMd0GfiIvg0a4a1oyFx2mSIq17I?= =?us-ascii?Q?M0s54y52jH1T/siLDgPQ/1hdv/eUwKdbJTAA8tp3WdYmg8dnKSl8E7Ul7WNN?= =?us-ascii?Q?WM/T3qq9QCu9xlzOTOH+0oQb+hBoJrCFUPWcuWqN4/KUC+vjtOvMPxFt5QPp?= =?us-ascii?Q?z2PblFdpJzdRsiMhffRA90Dm0KofaBLkdgbqULY+ym2uyXjUVGFGeS7OlXR8?= =?us-ascii?Q?nzuAe21sKCD4LkwjKi9C28xsX5ob4Mpwnwe5QF7/+YKWpvGEfa9qTxMvuS0Q?= =?us-ascii?Q?BJmbQwDcGJd1HBHSI+BkBAivY4+J7d46EOKhZDZaGpIkybNxBD6+joBYbOTI?= =?us-ascii?Q?Yzk868w1qBAqIDaUEAxdaXkOONUMGbj2fimy13LWyhNI8Z/ieWeXBKIhKha5?= =?us-ascii?Q?k/DD3lHpf4ltwuIq0H4KNUzynfCoNhkDtUBR6HFigg415zENx7X/t1ReYtwl?= =?us-ascii?Q?cSWFMrpiUW/wMPUqwlwsQ5v9FcjOXyHy912TxnurxyukuOK488ESkuBBEicb?= =?us-ascii?Q?0lnMP8p28msWBV703/QNPPqEf9sz4avE4VnLqOESOhBVqrxJqJkKQqJFHpA8?= =?us-ascii?Q?XhniSZnrVHp5lfJyaRcEwUDxN/5yS4qoQDdywfepfzUasPICGnSZGIB88/Sj?= =?us-ascii?Q?5m9X2q/sSQyaVCeLOI6Qbse5/Z0azbMxZCOCJVnL91QEz0OEmssjUY7AqURT?= =?us-ascii?Q?SdweQWUfxOqlHg0Anq42bFe5Futgh9QizndzCWkYmVjE05bUMVIzi2QG/e3x?= =?us-ascii?Q?UGXMW2iYhl7pKs0cE5We1+VqYVPQBjMdetSci4JiqpSujhG5E4T2eLOOE/PM?= =?us-ascii?Q?Xg=3D=3D?= X-MS-Exchange-CrossTenant-Network-Message-Id: be613658-8f38-4a7c-4ee0-08dd3726eb26 X-MS-Exchange-CrossTenant-AuthSource: SN7PR11MB8282.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jan 2025 18:44:05.1948 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: eKb92J6jKLwcO8exCcf8tDU6xmicH5z97MzIJPxFIzmijUe9YR3Nyq83vRMpiUD2ZQZFhKK7Zlg26JCceoAh6w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR11MB4707 X-OriginatorOrg: intel.com On Thu, Jan 16, 2025 at 03:07:18PM -0800, Lucas De Marchi wrote: > From: Vinay Belgaumkar > > Provide a PMU interface for GT C6 residency counters. The implementation > is ported over from the i915 PMU code. Residency is provided in units of > ms(like sysfs entry in - /sys/class/drm/card0/device/tile0/gt0/gtidle). > > Sample usage and output: > > $ perf list | grep gt-c6 > xe_0000_00_02.0/gt-c6-residency/ [Kernel PMU event] > > $ tail /sys/bus/event_source/devices/xe_0000_00_02.0/events/gt-c6-residency* > ==> /sys/bus/event_source/devices/xe_0000_00_02.0/events/gt-c6-residency <== > event=0x01 > > ==> /sys/bus/event_source/devices/xe_0000_00_02.0/events/gt-c6-residency.unit <== > ms > > $ perf stat -e xe_0000_00_02.0/gt-c6-residency,gt=0/ -I1000 > # time counts unit events > 1.001196056 1,001 ms xe_0000_00_02.0/gt-c6-residency,gt=0/ > 2.005216219 1,003 ms xe_0000_00_02.0/gt-c6-residency,gt=0/ > > Signed-off-by: Vinay Belgaumkar > Signed-off-by: Lucas De Marchi > --- > > Besides the rebase, that changed a lot how the event was added, > here is a summary of other changes: > > - Use xe_pm_runtime_get_if_active() when reading > xe_gt_idle_residency_msec() as there's not guarantee it will not be > suspended anymore by the time it reads the counter > > - Drop sample[] from the pmu struct and only use the prev/counter from > the perf_event struct. This avoids mixing the counter reported to 2 > separate clients. > > - Drop time ktime helpers and just use what's provided by > include/linux/ktime.h > > drivers/gpu/drm/xe/xe_pmu.c | 56 +++++++++++++++++++++++++++++++------ > 1 file changed, 48 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c > index c2af82ec3f793..37df9d3cc110c 100644 > --- a/drivers/gpu/drm/xe/xe_pmu.c > +++ b/drivers/gpu/drm/xe/xe_pmu.c > @@ -11,6 +11,7 @@ > #include "xe_device.h" > #include "xe_force_wake.h" > #include "xe_gt_clock.h" > +#include "xe_gt_idle.h" > #include "xe_gt_printk.h" > #include "xe_mmio.h" > #include "xe_macros.h" > @@ -117,16 +118,50 @@ static int xe_pmu_event_init(struct perf_event *event) > return 0; > } > > -static u64 __xe_pmu_event_read(struct perf_event *event) > +static u64 read_gt_c6_residency(struct xe_pmu *pmu, struct xe_gt *gt, u64 prev) > { > - struct xe_device *xe = container_of(event->pmu, typeof(*xe), pmu.base); > + struct xe_device *xe = gt_to_xe(gt); > + unsigned long flags; > + ktime_t t0; > + s64 delta; > + > + if (xe_pm_runtime_get_if_active(xe)) { > + u64 val = xe_gt_idle_residency_msec(>->gtidle); > + > + xe_pm_runtime_put(xe); > + > + return val; > + } > + > + /* > + * Estimate the idle residency by looking at the time the device was > + * suspended: should be good enough as long as the sampling frequency is > + * 2x or more than the suspend frequency. > + */ > + raw_spin_lock_irqsave(&pmu->lock, flags); > + t0 = pmu->suspend_timestamp[gt->info.id]; > + raw_spin_unlock_irqrestore(&pmu->lock, flags); I believe we should simply avoid the patch 4 and this block and use xe_pm_runtime_get(xe) instead of the if_active variant. I'm afraid this won't be a good estimative since this mix 2 different wakes of 2 different IP blocks... the runtime pm is for the entire device, while in runtime active the GTs can be sleeping in GT-C6. or did we get some deadlock risk on that scenario? perhaps we should get runtime pm in upper layers when using PMU? > + > + delta = ktime_ms_delta(ktime_get(), t0); > + > + return prev + delta; > +} > + > +static u64 __xe_pmu_event_read(struct perf_event *event, u64 prev) > +{ > + struct xe_pmu *pmu = container_of(event->pmu, typeof(*pmu), base); > + struct xe_device *xe = container_of(pmu, typeof(*xe), pmu); > struct xe_gt *gt = event_to_gt(event); > - u64 val = 0; > > if (!gt) > - return 0; > + return prev; > + > + switch (config_to_event_id(event->attr.config)) { > + case XE_PMU_EVENT_GT_C6_RESIDENCY: > + return read_gt_c6_residency(pmu, gt, prev); > + } > > - return val; > + return prev; > } > > static void xe_pmu_event_update(struct perf_event *event) > @@ -136,10 +171,11 @@ static void xe_pmu_event_update(struct perf_event *event) > > prev = local64_read(&hwc->prev_count); > do { > - new = __xe_pmu_event_read(event); > + new = __xe_pmu_event_read(event, prev); > } while (!local64_try_cmpxchg(&hwc->prev_count, &prev, new)); > > - local64_add(new - prev, &event->count); > + if (new > prev) > + local64_add(new - prev, &event->count); > } > > static void xe_pmu_event_read(struct perf_event *event) > @@ -162,7 +198,7 @@ static void xe_pmu_enable(struct perf_event *event) > * for all listeners. Even when the event was already enabled and has > * an existing non-zero value. > */ > - local64_set(&event->hw.prev_count, __xe_pmu_event_read(event)); > + local64_set(&event->hw.prev_count, __xe_pmu_event_read(event, 0)); > } > > static void xe_pmu_event_start(struct perf_event *event, int flags) > @@ -267,6 +303,10 @@ static const struct attribute_group pmu_events_attr_group = { > > static void set_supported_events(struct xe_pmu *pmu) > { > + struct xe_device *xe = container_of(pmu, typeof(*xe), pmu); > + > + if (!xe->info.skip_guc_pc) > + pmu->supported_events |= BIT_ULL(XE_PMU_EVENT_GT_C6_RESIDENCY); > } > > /** > -- > 2.48.0 >