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Mon, 03 Mar 2025 09:19:44 -0800 (PST) Received: from debian ([2607:fb90:8e63:c2b3:5405:c8bf:c1d1:41d5]) by smtp.gmail.com with ESMTPSA id af79cd13be357-7c378da08f2sm617957485a.81.2025.03.03.09.19.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Mar 2025 09:19:44 -0800 (PST) From: Fan Ni X-Google-Original-From: Fan Ni Date: Mon, 3 Mar 2025 09:19:38 -0800 To: Shradha Todi Cc: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, manivannan.sadhasivam@linaro.org, lpieralisi@kernel.org, kw@linux.com, robh@kernel.org, bhelgaas@google.com, jingoohan1@gmail.com, Jonathan.Cameron@huawei.com, nifan.cxl@gmail.com, a.manzanares@samsung.com, pankaj.dubey@samsung.com, cassel@kernel.org, 18255117159@163.com, xueshuai@linux.alibaba.com, renyu.zj@linux.alibaba.com, will@kernel.org, mark.rutland@arm.com Subject: Re: [PATCH v7 1/5] perf/dwc_pcie: Move common DWC struct definitions to 'pcie-dwc.h' Message-ID: References: <20250221131548.59616-1-shradha.t@samsung.com> <20250221131548.59616-2-shradha.t@samsung.com> Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250221131548.59616-2-shradha.t@samsung.com> On Fri, Feb 21, 2025 at 06:45:44PM +0530, Shradha Todi wrote: > From: Manivannan Sadhasivam > > Since these are common to all Desginware PCIe IPs, move them to a new > header 'pcie-dwc.h', so that other drivers like debugfs, perf and sysfs > could make use of them. > > Signed-off-by: Manivannan Sadhasivam > Signed-off-by: Shradha Todi Reviewed-by: Fan Ni > --- > MAINTAINERS | 1 + > drivers/perf/dwc_pcie_pmu.c | 25 +++---------------------- > include/linux/pcie-dwc.h | 34 ++++++++++++++++++++++++++++++++++ > 3 files changed, 38 insertions(+), 22 deletions(-) > create mode 100644 include/linux/pcie-dwc.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index 3864d473f52f..6474a2d83de4 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -18167,6 +18167,7 @@ S: Maintained > F: Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml > F: Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml > F: drivers/pci/controller/dwc/*designware* > +F: include/linux/pcie-dwc.h > > PCI DRIVER FOR TI DRA7XX/J721E > M: Vignesh Raghavendra > diff --git a/drivers/perf/dwc_pcie_pmu.c b/drivers/perf/dwc_pcie_pmu.c > index cccecae9823f..da30f2c2d674 100644 > --- a/drivers/perf/dwc_pcie_pmu.c > +++ b/drivers/perf/dwc_pcie_pmu.c > @@ -13,6 +13,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -99,26 +100,6 @@ struct dwc_pcie_dev_info { > struct list_head dev_node; > }; > > -struct dwc_pcie_pmu_vsec_id { > - u16 vendor_id; > - u16 vsec_id; > - u8 vsec_rev; > -}; > - > -/* > - * VSEC IDs are allocated by the vendor, so a given ID may mean different > - * things to different vendors. See PCIe r6.0, sec 7.9.5.2. > - */ > -static const struct dwc_pcie_pmu_vsec_id dwc_pcie_pmu_vsec_ids[] = { > - { .vendor_id = PCI_VENDOR_ID_ALIBABA, > - .vsec_id = 0x02, .vsec_rev = 0x4 }, > - { .vendor_id = PCI_VENDOR_ID_AMPERE, > - .vsec_id = 0x02, .vsec_rev = 0x4 }, > - { .vendor_id = PCI_VENDOR_ID_QCOM, > - .vsec_id = 0x02, .vsec_rev = 0x4 }, > - {} /* terminator */ > -}; > - > static ssize_t cpumask_show(struct device *dev, > struct device_attribute *attr, > char *buf) > @@ -529,14 +510,14 @@ static void dwc_pcie_unregister_pmu(void *data) > > static u16 dwc_pcie_des_cap(struct pci_dev *pdev) > { > - const struct dwc_pcie_pmu_vsec_id *vid; > + const struct dwc_pcie_vsec_id *vid; > u16 vsec; > u32 val; > > if (!pci_is_pcie(pdev) || !(pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)) > return 0; > > - for (vid = dwc_pcie_pmu_vsec_ids; vid->vendor_id; vid++) { > + for (vid = dwc_pcie_rasdes_vsec_ids; vid->vendor_id; vid++) { > vsec = pci_find_vsec_capability(pdev, vid->vendor_id, > vid->vsec_id); > if (vsec) { > diff --git a/include/linux/pcie-dwc.h b/include/linux/pcie-dwc.h > new file mode 100644 > index 000000000000..40f3545731c8 > --- /dev/null > +++ b/include/linux/pcie-dwc.h > @@ -0,0 +1,34 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (C) 2021-2023 Alibaba Inc. > + * > + * Copyright 2025 Linaro Ltd. > + * Author: Manivannan Sadhasivam > + */ > + > +#ifndef LINUX_PCIE_DWC_H > +#define LINUX_PCIE_DWC_H > + > +#include > + > +struct dwc_pcie_vsec_id { > + u16 vendor_id; > + u16 vsec_id; > + u8 vsec_rev; > +}; > + > +/* > + * VSEC IDs are allocated by the vendor, so a given ID may mean different > + * things to different vendors. See PCIe r6.0, sec 7.9.5.2. > + */ > +static const struct dwc_pcie_vsec_id dwc_pcie_rasdes_vsec_ids[] = { > + { .vendor_id = PCI_VENDOR_ID_ALIBABA, > + .vsec_id = 0x02, .vsec_rev = 0x4 }, > + { .vendor_id = PCI_VENDOR_ID_AMPERE, > + .vsec_id = 0x02, .vsec_rev = 0x4 }, > + { .vendor_id = PCI_VENDOR_ID_QCOM, > + .vsec_id = 0x02, .vsec_rev = 0x4 }, > + {} /* terminator */ > +}; > + > +#endif /* LINUX_PCIE_DWC_H */ > -- > 2.17.1 >