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From: Arnaldo Carvalho de Melo <acme@kernel.org>
To: Ravi Bangoria <ravi.bangoria@amd.com>
Cc: Namhyung Kim <namhyung@kernel.org>,
	peterz@infradead.org, mingo@kernel.org, eranian@google.com,
	kan.liang@linux.intel.com, jolsa@kernel.org, irogers@google.com,
	adrian.hunter@intel.com, leo.yan@linaro.org, kjain@linux.ibm.com,
	linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
	sandipan.das@amd.com, ananth.narayan@amd.com,
	santosh.shukla@amd.com
Subject: Re: [PATCH v3 0/9] perf/mem: AMD IBS and generic tools improvements
Date: Mon, 10 Apr 2023 19:31:32 -0300	[thread overview]
Message-ID: <ZDSORDbkoN0PvfkL@kernel.org> (raw)
In-Reply-To: <ZDQoJFcyxpF+4Qu+@kernel.org>

Em Mon, Apr 10, 2023 at 12:15:48PM -0300, Arnaldo Carvalho de Melo escreveu:
> Em Mon, Apr 10, 2023 at 07:53:57AM +0530, Ravi Bangoria escreveu:
> > On 08-Apr-23 3:14 AM, Namhyung Kim wrote:
> > > Hi Ravi,
> > > 
> > > On Fri, Apr 7, 2023 at 4:25 AM Ravi Bangoria <ravi.bangoria@amd.com> wrote:
> > >>
> > >> Kernel IBS driver wasn't using new PERF_MEM_* APIs due to some of its
> > >> limitations. Mainly:
> > >>
> > >> 1. mem_lvl_num doesn't allow setting multiple sources whereas old API
> > >>    allows it. Setting multiple data sources is useful because IBS on
> > >>    pre-zen4 uarch doesn't provide fine granular DataSrc details (there
> > >>    is only one such DataSrc(2h) though).
> > >> 2. perf mem sorting logic (sort__lvl_cmp()) ignores mem_lvl_num. perf
> > >>    c2c (c2c_decode_stats()) does not use mem_lvl_num at all. perf mem
> > >>    prints mem_lvl and mem_lvl_num both if both are set, which is ugly.
> > >>
> > >> Set mem_lvl_num, mem_remote and mem_hops for data_src via IBS. Handle
> > >> first issue using mem_lvl_num = ANY_CACHE | HOPS_0. In addition to
> > >> setting new API fields, convert all individual field assignments to
> > >> compile time wrapper macros built using PERF_MEM_S(). Also convert
> > >> DataSrc conditional code to array lookups.
> > >>
> > >> Interpretation of perf_mem_data_src by perf_mem__lvl_scnprintf() was
> > >> non-intuitive. Make it sane.
> > > 
> > > Looks good, but I think you need to split kernel and user patches.
> > 
> > Patch #1 to #3 are kernel changes. Patch #4 to #9 are userspace changes.
> > Arnaldo, Peter, please let me know if you wants to split the series and
> > resend.
> 
> I can always use b4's -P option :-) So no need to resubmit, I can pick
>> the tools bits,

Done
 
> - Arnaldo
>  
> > > 
> > >>
> > >> v2: https://lore.kernel.org/r/20230327130851.1565-1-ravi.bangoria%40amd.com
> > >> v2->v3:
> > >>   - IBS: Don't club RmtNode with DataSrc=7 (IO)
> > >>   - Make perf_mem__lvl_scnprintf() more sane
> > >>   - Introduce PERF_MEM_LVLNUM_UNC, set it along with PERF_MEM_LVL_UNC
> > >>     and interpreat it in tool.
> > >>   - Add PERF_MEM_LVLNUM_NA to default data_src value
> > >>   - Change some of the IBS bit description according to latest PPR
> > >>
> > >> Namhyung Kim (1):
> > >>   perf/x86/ibs: Set mem_lvl_num, mem_remote and mem_hops for data_src
> > >>
> > >> Ravi Bangoria (8):
> > >>   perf/mem: Introduce PERF_MEM_LVLNUM_UNC
> > >>   perf/mem: Add PERF_MEM_LVLNUM_NA to PERF_MEM_NA
> > >>   perf headers: Sync uapi/linux/perf_event.h
> > >>   perf mem: Add PERF_MEM_LVLNUM_NA to PERF_MEM_DATA_SRC_NONE
> > >>   perf mem: Add support for printing PERF_MEM_LVLNUM_UNC
> > >>   perf mem: Refactor perf_mem__lvl_scnprintf()
> > >>   perf mem: Increase HISTC_MEM_LVL column size to 39 chars
> > >>   perf script ibs: Change bit description according to latest PPR
> > > 
> > > Acked-by: Namhyung Kim <namhyung@kernel.org>
> > 
> > Thanks!
> 
> -- 
> 
> - Arnaldo

-- 

- Arnaldo

  reply	other threads:[~2023-04-10 22:31 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-07 11:24 [PATCH v3 0/9] perf/mem: AMD IBS and generic tools improvements Ravi Bangoria
2023-04-07 11:24 ` [PATCH v3 1/9] perf/mem: Introduce PERF_MEM_LVLNUM_UNC Ravi Bangoria
2023-04-07 11:24 ` [PATCH v3 2/9] perf/mem: Add PERF_MEM_LVLNUM_NA to PERF_MEM_NA Ravi Bangoria
2023-04-07 11:24 ` [PATCH v3 3/9] perf/x86/ibs: Set mem_lvl_num, mem_remote and mem_hops for data_src Ravi Bangoria
2023-04-07 11:24 ` [PATCH v3 4/9] perf headers: Sync uapi/linux/perf_event.h Ravi Bangoria
2023-04-07 11:24 ` [PATCH v3 5/9] perf mem: Add PERF_MEM_LVLNUM_NA to PERF_MEM_DATA_SRC_NONE Ravi Bangoria
2023-04-07 11:24 ` [PATCH v3 6/9] perf mem: Add support for printing PERF_MEM_LVLNUM_UNC Ravi Bangoria
2023-04-07 11:24 ` [PATCH v3 7/9] perf mem: Refactor perf_mem__lvl_scnprintf() Ravi Bangoria
2023-04-07 11:24 ` [PATCH v3 8/9] perf mem: Increase HISTC_MEM_LVL column size to 39 chars Ravi Bangoria
2023-04-07 11:24 ` [PATCH v3 9/9] perf script ibs: Change bit description according to latest PPR Ravi Bangoria
2023-04-07 21:44 ` [PATCH v3 0/9] perf/mem: AMD IBS and generic tools improvements Namhyung Kim
2023-04-10  2:23   ` Ravi Bangoria
2023-04-10 15:15     ` Arnaldo Carvalho de Melo
2023-04-10 22:31       ` Arnaldo Carvalho de Melo [this message]
2023-05-16  2:45     ` Ravi Bangoria
2023-05-29  4:05       ` Ravi Bangoria
2023-06-30  6:35         ` Ravi Bangoria

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