From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E731C7EE25 for ; Fri, 9 Jun 2023 08:02:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239937AbjFIICU (ORCPT ); Fri, 9 Jun 2023 04:02:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239947AbjFIICE (ORCPT ); Fri, 9 Jun 2023 04:02:04 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 05C9A4215; Fri, 9 Jun 2023 01:00:08 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2D423AB6; Fri, 9 Jun 2023 00:59:44 -0700 (PDT) Received: from FVFF77S0Q05N (unknown [10.57.25.215]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EF6613F71E; Fri, 9 Jun 2023 00:58:53 -0700 (PDT) Date: Fri, 9 Jun 2023 08:58:49 +0100 From: Mark Rutland To: Ian Rogers Cc: Ravi Bangoria , Suzuki K Poulose , Mike Leach , Leo Yan , John Garry , Will Deacon , James Clark , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Adrian Hunter , Kajol Jain , Jing Zhang , Kan Liang , Zhengjun Xing , Madhavan Srinivasan , Athira Rajeev , Ming Wang , Huacai Chen , Sandipan Das , Dmitrii Dolgov <9erthalion6@gmail.com>, Sean Christopherson , Ali Saidi , Rob Herring , Thomas Richter , Kang Minchul , linux-kernel@vger.kernel.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org Subject: Re: [PATCH v5 28/34] perf pmus: Split pmus list into core and other Message-ID: References: <20230527072210.2900565-1-irogers@google.com> <20230527072210.2900565-29-irogers@google.com> <7c7d9279-25b0-328e-af41-66c2096febaa@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-perf-users@vger.kernel.org On Thu, Jun 08, 2023 at 10:35:02PM -0700, Ian Rogers wrote: > On Thu, Jun 8, 2023 at 10:30 PM Ravi Bangoria wrote: > > > > On 09-Jun-23 10:10 AM, Ian Rogers wrote: > > > On Thu, Jun 8, 2023 at 9:01 PM Ravi Bangoria wrote: > > >> > > >> Hi Ian, > > > > > > Hi Ravi, > > > > > >> On 27-May-23 12:52 PM, Ian Rogers wrote: > > >>> Split the pmus list into core and other. This will later allow for > > >>> the core and other pmus to be populated separately. > > >>> > > >>> Signed-off-by: Ian Rogers > > >>> Reviewed-by: Kan Liang > > >>> --- > > >>> tools/perf/util/pmus.c | 52 ++++++++++++++++++++++++++++++------------ > > >>> 1 file changed, 38 insertions(+), 14 deletions(-) > > >>> > > >>> diff --git a/tools/perf/util/pmus.c b/tools/perf/util/pmus.c > > >>> index 58ff7937e9b7..4ef4fecd335f 100644 > > >>> --- a/tools/perf/util/pmus.c > > >>> +++ b/tools/perf/util/pmus.c > > >>> @@ -12,13 +12,19 @@ > > >>> #include "pmu.h" > > >>> #include "print-events.h" > > >>> > > >>> -static LIST_HEAD(pmus); > > >>> +static LIST_HEAD(core_pmus); > > >>> +static LIST_HEAD(other_pmus); > > >> > > >> AMD ibs_fetch// and ibs_op// PMUs are per SMT-thread and are independent of > > >> core hw pmu. I wonder where does IBS fit. Currently it's part of other_pmus. > > >> So, is it safe to assume that other_pmus are not just uncore pmus? In that > > >> case shall we add a comment here? > > > > > > I'm a fan of comments. The code has landed in perf-tools-next: > > > https://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git/tree/tools/perf/util/pmus.c?h=perf-tools-next > > > Do you have any suggestions on wording? I've had limited success > > > adding glossary terms, for example, offcore vs uncore: > > > https://perf.wiki.kernel.org/index.php/Glossary#Offcore > > > I think offcore is a more interconnect related term, but I'd prefer > > > not to be inventing the definitions. I'd like it if we could be less > > > ambiguous in the code and provide useful information on the wiki, so > > > help appreciated :-) > > > > Does this look good? > > > > /* > > * core_pmus: A PMU belongs to core_pmus if it's name is "cpu" or it's sysfs > > * directory contains "cpus" file. All PMUs belonging to core_pmus > > * must have pmu->is_core=1. If there are more than one PMUs in > > * this list, perf interprets it as a heterogeneous platform. > > > Looks good but a nit here. It is heterogeneous from point-of-view of > PMUs, there are ARM systems where they are heterogenous with big and > little cores but they have a single homogeneous PMU driver. The perf > tool will treat them as homogeneous. For the sake of the comment: there's a little more nuance here. The intent is that each distinct micro-architecture has its own PMU instance, but some people write their device trees incorrectly with a single pmu node rather than separate pmu nodes per micro-architecture. That should be viewed as a FW bug, even if we have to deal with it here. Thanks, Mark.