From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29061C7EE25 for ; Fri, 9 Jun 2023 13:15:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241305AbjFINPP (ORCPT ); Fri, 9 Jun 2023 09:15:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241213AbjFINPJ (ORCPT ); Fri, 9 Jun 2023 09:15:09 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 1B5A4E4A; Fri, 9 Jun 2023 06:15:08 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 36C7BAB6; Fri, 9 Jun 2023 06:15:53 -0700 (PDT) Received: from FVFF77S0Q05N.cambridge.arm.com (FVFF77S0Q05N.cambridge.arm.com [10.1.38.153]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EE0123F71E; Fri, 9 Jun 2023 06:15:05 -0700 (PDT) Date: Fri, 9 Jun 2023 14:15:03 +0100 From: Mark Rutland To: Anshuman Khandual Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, will@kernel.org, catalin.marinas@arm.com, Mark Brown , James Clark , Rob Herring , Marc Zyngier , Suzuki Poulose , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , linux-perf-users@vger.kernel.org Subject: Re: [PATCH V11 06/10] arm64/perf: Enable branch stack events via FEAT_BRBE Message-ID: References: <20230531040428.501523-1-anshuman.khandual@arm.com> <20230531040428.501523-7-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-perf-users@vger.kernel.org On Fri, Jun 09, 2023 at 01:47:18PM +0100, Mark Rutland wrote: > On Fri, Jun 09, 2023 at 10:52:37AM +0530, Anshuman Khandual wrote: > > On 6/5/23 19:13, Mark Rutland wrote: > > > Looking at I see: > > > > > > | /* > > > | * branch stack layout: > > > | * nr: number of taken branches stored in entries[] > > > | * hw_idx: The low level index of raw branch records > > > | * for the most recent branch. > > > | * -1ULL means invalid/unknown. > > > | * > > > | * Note that nr can vary from sample to sample > > > | * branches (to, from) are stored from most recent > > > | * to least recent, i.e., entries[0] contains the most > > > | * recent branch. > > > | * The entries[] is an abstraction of raw branch records, > > > | * which may not be stored in age order in HW, e.g. Intel LBR. > > > | * The hw_idx is to expose the low level index of raw > > > | * branch record for the most recent branch aka entries[0]. > > > | * The hw_idx index is between -1 (unknown) and max depth, > > > | * which can be retrieved in /sys/devices/cpu/caps/branches. > > > | * For the architectures whose raw branch records are > > > | * already stored in age order, the hw_idx should be 0. > > > | */ > > > | struct perf_branch_stack { > > > | __u64 nr; > > > | __u64 hw_idx; > > > | struct perf_branch_entry entries[]; > > > | }; > > > > > > ... which seems to indicate we should be setting hw_idx to 0, since IIUC our > > > records are in age order. > > Branch records are indeed in age order, sure will change hw_idx as 0. Earlier > > figured that there was no need for hw_idx and hence marked it as -1UL similar > > to other platforms like powerpc. > > That's fair enough; looking at power_pmu_bhrb_read() in > arch/powerpc/perf/core-book3s.c, I see a comment: > > Branches are read most recent first (ie. mfbhrb 0 is > the most recent branch). > > ... which suggests that should be 0 also, or that the documentation is wrong. > > Do you know how the perf tool consumes this? Thinking about this some more, if what this is saying is that if entries[0] must be strictly the last branch, and we've lost branches due to interrupt latency, then we clearly don't meet that requirement and must report -1ULL here. So while it'd be nice to figure this out, I'm happy using -1ULL, and would be a bit concerned using 0. Sorry for flip-flopping on this. Thanks, Mark.