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From: Yu-Chien Peter Lin <peterlin@andestech.com>
To: Inochi Amaoto <inochiama@outlook.com>
Cc: Guo Ren <guoren@kernel.org>, <acme@kernel.org>,
	<adrian.hunter@intel.com>, <ajones@ventanamicro.com>,
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	<wens@csie.org>, <will@kernel.org>, <ycliang@andestech.com>
Subject: Re: [PATCH v4 09/13] dt-bindings: riscv: Add T-Head PMU extension description
Date: Thu, 30 Nov 2023 17:21:01 +0800	[thread overview]
Message-ID: <ZWhT_VSpl2aksVK7@APC323> (raw)
In-Reply-To: <IA1PR20MB49537364BDF1ADE185CA8FE4BB82A@IA1PR20MB4953.namprd20.prod.outlook.com>

Hi Inochi,

On Thu, Nov 30, 2023 at 04:29:22PM +0800, Inochi Amaoto wrote:
> >
> >Hi Guo Ren,
> >
> >On Thu, Nov 23, 2023 at 05:14:30AM +0800, Guo Ren wrote:
> >> On Wed, Nov 22, 2023 at 8:17 PM Yu Chien Peter Lin
> >> <peterlin@andestech.com> wrote:
> >>>
> >>> Document the ISA string for T-Head performance monitor extension
> >>> which provides counter overflow interrupt mechanism.
> >>>
> >>> Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
> >>> ---
> >>> Changes v2 -> v3:
> >>>   - New patch
> >>> Changes v3 -> v4:
> >>>   - No change
> >>> ---
> >>>  Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++
> >>>  1 file changed, 6 insertions(+)
> >>>
> >>> diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
> >>> index c91ab0e46648..694efaea8fce 100644
> >>> --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
> >>> +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
> >>> @@ -258,5 +258,11 @@ properties:
> >>>              in commit 2e5236 ("Ztso is now ratified.") of the
> >>>              riscv-isa-manual.
> >>>
> >>> +        - const: xtheadpmu
> >>> +          description:
> >>> +            The T-Head performance monitor extension for counter overflow. For more
> >>> +            details, see the chapter 12 in the Xuantie C906 user manual.
> >>> +            https://github.com/T-head-Semi/openc906/tree/main/doc
> >>> +
> >>>  additionalProperties: true
> >>>  ...
> >>> --
> >>> 2.34.1
> >>>
> >> Reviewed-by: Guo Ren <guoren@kernel.org>
> >
> >Thanks for the review.
> >Would you share document about T-Head PMU?
> >
> 
> Hi, Peter Lin:
> 
> You can use the following two document to get all events:
> https://github.com/T-head-Semi/openc906/tree/main/doc
> https://github.com/T-head-Semi/openc910/tree/main/doc
> 
> There are also some RTL code can describe these events:
> https://github.com/T-head-Semi/openc910/blob/e0c4ad8ec7f8c70f649d826ebd6c949086453272/C910_RTL_FACTORY/gen_rtl/pmu/rtl/ct_hpcp_top.v#L1123
> https://github.com/T-head-Semi/openc906/blob/af5614d72de7e5a4b8609c427d2e20af1deb21c4/C906_RTL_FACTORY/gen_rtl/pmu/rtl/aq_hpcp_top.v#L543
> 
> The perf events json can also be used as document, this is already
> applied (with more detailed explanation):
> https://lore.kernel.org/all/IA1PR20MB495325FCF603BAA841E29281BBBAA@IA1PR20MB4953.namprd20.prod.outlook.com/

Thanks for reaching out!
The updated description will be:

- const: xtheadpmu
  description:
    The T-Head performance monitor extension for counter overflow, as ratified
    in commit bd9206 ("Initial commit") of Xuantie C906 user manual.
    https://github.com/T-head-Semi/openc906/tree/main/doc

Is it OK with you?

Best regards,
Peter Lin

> Best regards,
> Inochi

  reply	other threads:[~2023-11-30  9:23 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-22 12:12 [PATCH v4 00/13] Support Andes PMU extension Yu Chien Peter Lin
2023-11-22 12:12 ` [PATCH v4 01/13] riscv: errata: Rename defines for Andes Yu Chien Peter Lin
2023-11-24 14:57   ` Lad, Prabhakar
2023-11-22 12:12 ` [PATCH v4 02/13] irqchip/riscv-intc: Allow large non-standard interrupt number Yu Chien Peter Lin
2023-12-08 15:54   ` Thomas Gleixner
2023-12-12 10:17     ` Yu-Chien Peter Lin
2023-11-22 12:12 ` [PATCH v4 03/13] irqchip/riscv-intc: Introduce Andes hart-level interrupt controller Yu Chien Peter Lin
2023-12-08 16:01   ` Thomas Gleixner
2023-12-12 10:28     ` Yu-Chien Peter Lin
2023-11-22 12:12 ` [PATCH v4 04/13] dt-bindings: riscv: Add Andes interrupt controller compatible string Yu Chien Peter Lin
2023-11-23 14:38   ` Conor Dooley
2023-11-24 15:03   ` Lad, Prabhakar
2023-11-24 15:05     ` Conor Dooley
2023-11-29  6:43     ` Yu-Chien Peter Lin
2023-11-22 12:12 ` [PATCH v4 05/13] riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC Yu Chien Peter Lin
2023-11-22 16:36   ` Geert Uytterhoeven
2023-11-24 15:04   ` Lad, Prabhakar
2023-11-22 12:12 ` [PATCH v4 06/13] perf: RISC-V: Eliminate redundant interrupt enable/disable operations Yu Chien Peter Lin
2023-11-22 12:12 ` [PATCH v4 07/13] RISC-V: Move T-Head PMU to CPU feature alternative framework Yu Chien Peter Lin
2023-11-22 21:16   ` Guo Ren
2023-11-23 14:45   ` Conor Dooley
2023-11-22 12:12 ` [PATCH v4 08/13] perf: RISC-V: Introduce Andes PMU for perf event sampling Yu Chien Peter Lin
2023-11-24 15:06   ` Lad, Prabhakar
2023-11-22 12:12 ` [PATCH v4 09/13] dt-bindings: riscv: Add T-Head PMU extension description Yu Chien Peter Lin
2023-11-22 21:14   ` Guo Ren
2023-11-29  8:48     ` Yu-Chien Peter Lin
2023-11-30  8:29       ` Inochi Amaoto
2023-11-30  9:21         ` Yu-Chien Peter Lin [this message]
2023-11-30 12:16           ` Inochi Amaoto
2023-11-30 12:58             ` Conor Dooley
2023-11-30 23:11               ` Inochi Amaoto
2023-12-01  0:40                 ` Conor Dooley
2023-12-01  0:57                   ` Inochi Amaoto
2023-12-01  1:14           ` Inochi Amaoto
2023-12-06  3:14             ` Yu-Chien Peter Lin
2023-11-23 14:48   ` Conor Dooley
2023-11-29  8:47     ` Yu-Chien Peter Lin
2023-11-29 12:33       ` Conor Dooley
2023-11-22 12:12 ` [PATCH v4 10/13] dt-bindings: riscv: Add Andes " Yu Chien Peter Lin
2023-11-24 15:07   ` Lad, Prabhakar
2023-11-22 12:12 ` [PATCH v4 11/13] riscv: dts: allwinner: Add T-Head PMU extension Yu Chien Peter Lin
2023-11-22 21:12   ` Guo Ren
2023-11-23 14:58   ` Conor Dooley
2023-11-29  9:34     ` Yu-Chien Peter Lin
2023-11-22 12:12 ` [PATCH v4 12/13] riscv: dts: renesas: Add Andes " Yu Chien Peter Lin
2023-11-22 16:34   ` Geert Uytterhoeven
2023-11-24 15:07   ` Lad, Prabhakar
2023-11-22 12:12 ` [PATCH v4 13/13] riscv: andes: Support symbolic FW and HW raw events Yu Chien Peter Lin
2023-11-24 15:08   ` Lad, Prabhakar

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