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[34.105.13.176]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1f479010035sm85280765ad.82.2024.05.29.22.24.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 May 2024 22:24:08 -0700 (PDT) Date: Thu, 30 May 2024 05:24:05 +0000 From: Mingwei Zhang To: "Chen, Zide" Cc: Sean Christopherson , Paolo Bonzini , Xiong Zhang , Dapeng Mi , Kan Liang , Zhenyu Wang , Manali Shukla , Sandipan Das , Jim Mattson , Stephane Eranian , Ian Rogers , Namhyung Kim , gce-passthrou-pmu-dev@google.com, Samantha Alt , Zhiyuan Lv , Yanfei Xu , maobibo , Like Xu , Peter Zijlstra , kvm@vger.kernel.org, linux-perf-users@vger.kernel.org Subject: Re: [PATCH v2 24/54] KVM: x86/pmu: Create a function prototype to disable MSR interception Message-ID: References: <20240506053020.3911940-1-mizhang@google.com> <20240506053020.3911940-25-mizhang@google.com> Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Wed, May 08, 2024, Chen, Zide wrote: > > > On 5/5/2024 10:29 PM, Mingwei Zhang wrote: > > Add one extra pmu function prototype in kvm_pmu_ops to disable PMU MSR > > interception. > > > > Signed-off-by: Mingwei Zhang > > Signed-off-by: Dapeng Mi > > --- > > arch/x86/include/asm/kvm-x86-pmu-ops.h | 1 + > > arch/x86/kvm/cpuid.c | 4 ++++ > > arch/x86/kvm/pmu.c | 5 +++++ > > arch/x86/kvm/pmu.h | 2 ++ > > 4 files changed, 12 insertions(+) > > > > diff --git a/arch/x86/include/asm/kvm-x86-pmu-ops.h b/arch/x86/include/asm/kvm-x86-pmu-ops.h > > index fd986d5146e4..1b7876dcb3c3 100644 > > --- a/arch/x86/include/asm/kvm-x86-pmu-ops.h > > +++ b/arch/x86/include/asm/kvm-x86-pmu-ops.h > > @@ -24,6 +24,7 @@ KVM_X86_PMU_OP(is_rdpmc_passthru_allowed) > > KVM_X86_PMU_OP_OPTIONAL(reset) > > KVM_X86_PMU_OP_OPTIONAL(deliver_pmi) > > KVM_X86_PMU_OP_OPTIONAL(cleanup) > > +KVM_X86_PMU_OP_OPTIONAL(passthrough_pmu_msrs) > > > > #undef KVM_X86_PMU_OP > > #undef KVM_X86_PMU_OP_OPTIONAL > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > > index 77352a4abd87..b577ba649feb 100644 > > --- a/arch/x86/kvm/cpuid.c > > +++ b/arch/x86/kvm/cpuid.c > > @@ -381,6 +381,10 @@ static void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu) > > vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu); > > > > kvm_pmu_refresh(vcpu); > > + > > + if (is_passthrough_pmu_enabled(vcpu)) > > + kvm_pmu_passthrough_pmu_msrs(vcpu); > > + > > vcpu->arch.cr4_guest_rsvd_bits = > > __cr4_reserved_bits(guest_cpuid_has, vcpu); > > > > diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c > > index 3afefe4cf6e2..bd94f2d67f5c 100644 > > --- a/arch/x86/kvm/pmu.c > > +++ b/arch/x86/kvm/pmu.c > > @@ -1059,3 +1059,8 @@ int kvm_vm_ioctl_set_pmu_event_filter(struct kvm *kvm, void __user *argp) > > kfree(filter); > > return r; > > } > > + > > +void kvm_pmu_passthrough_pmu_msrs(struct kvm_vcpu *vcpu) > > +{ > > + static_call_cond(kvm_x86_pmu_passthrough_pmu_msrs)(vcpu); > > +} > > Don't quite understand why a separate callback is needed. It seems it's > not messier if put this logic in the kvm_x86_vcpu_after_set_cpuid() > callback. One of the key point here is whether we _can_ intercept RDPMC. We have to intercept it if there is _any_ counters / MSRs that is accessible by rdmpc. In Intel CPU, the PERF_METRICS MSR is accessible from RDPMC. This MSR is a vendor specific one. So that's why we added another vendor API. Thanks. -Mingwei