From: Mark Rutland <mark.rutland@arm.com>
To: "Rob Herring (Arm)" <robh@kernel.org>
Cc: Russell King <linux@armlinux.org.uk>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@kernel.org>, Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
Oliver Upton <oliver.upton@linux.dev>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Catalin Marinas <catalin.marinas@arm.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
kvmarm@lists.linux.dev
Subject: Re: [PATCH 5/9] KVM: arm64: pmu: Use arm_pmuv3.h register accessors
Date: Mon, 10 Jun 2024 12:02:21 +0100 [thread overview]
Message-ID: <ZmbdPYndL2_We387@J2N7QTR9R3> (raw)
In-Reply-To: <20240607-arm-pmu-3-9-icntr-v1-5-c7bd2dceff3b@kernel.org>
On Fri, Jun 07, 2024 at 02:31:30PM -0600, Rob Herring (Arm) wrote:
> Commit df29ddf4f04b ("arm64: perf: Abstract system register accesses
> away") split off PMU register accessor functions to a standalone header.
> Let's use it for KVM PMU code and get rid one copy of the ugly switch
> macro.
>
> Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
> ---
> arch/arm64/include/asm/arm_pmuv3.h | 13 ++++++++
> arch/arm64/kvm/pmu.c | 67 +++++---------------------------------
> 2 files changed, 22 insertions(+), 58 deletions(-)
Acked-by: Mark Rutland <mark.rutland@arm.com>
Mark.
>
> diff --git a/arch/arm64/include/asm/arm_pmuv3.h b/arch/arm64/include/asm/arm_pmuv3.h
> index e96ce7900fc7..1ed91334fede 100644
> --- a/arch/arm64/include/asm/arm_pmuv3.h
> +++ b/arch/arm64/include/asm/arm_pmuv3.h
> @@ -33,6 +33,14 @@ static inline void write_pmevtypern(int n, unsigned long val)
> PMEVN_SWITCH(n, WRITE_PMEVTYPERN);
> }
>
> +#define RETURN_READ_PMEVTYPERN(n) \
> + return read_sysreg(pmevtyper##n##_el0)
> +static inline unsigned long read_pmevtypern(int n)
> +{
> + PMEVN_SWITCH(n, RETURN_READ_PMEVTYPERN);
> + return 0;
> +}
> +
> static inline unsigned long read_pmmir(void)
> {
> return read_cpuid(PMMIR_EL1);
> @@ -96,6 +104,11 @@ static inline void write_pmccfiltr(u64 val)
> write_sysreg(val, pmccfiltr_el0);
> }
>
> +static inline u64 read_pmccfiltr(void)
> +{
> + return read_sysreg(pmccfiltr_el0);
> +}
> +
> static inline void write_pmovsclr(u64 val)
> {
> write_sysreg(val, pmovsclr_el0);
> diff --git a/arch/arm64/kvm/pmu.c b/arch/arm64/kvm/pmu.c
> index e633b4434c6a..01c9a9efdd1c 100644
> --- a/arch/arm64/kvm/pmu.c
> +++ b/arch/arm64/kvm/pmu.c
> @@ -6,6 +6,8 @@
> #include <linux/kvm_host.h>
> #include <linux/perf_event.h>
>
> +#include <asm/arm_pmuv3.h>
> +
> static DEFINE_PER_CPU(struct kvm_pmu_events, kvm_pmu_events);
>
> /*
> @@ -62,63 +64,16 @@ void kvm_clr_pmu_events(u64 clr)
> pmu->events_guest &= ~clr;
> }
>
> -#define PMEVTYPER_READ_CASE(idx) \
> - case idx: \
> - return read_sysreg(pmevtyper##idx##_el0)
> -
> -#define PMEVTYPER_WRITE_CASE(idx) \
> - case idx: \
> - write_sysreg(val, pmevtyper##idx##_el0); \
> - break
> -
> -#define PMEVTYPER_CASES(readwrite) \
> - PMEVTYPER_##readwrite##_CASE(0); \
> - PMEVTYPER_##readwrite##_CASE(1); \
> - PMEVTYPER_##readwrite##_CASE(2); \
> - PMEVTYPER_##readwrite##_CASE(3); \
> - PMEVTYPER_##readwrite##_CASE(4); \
> - PMEVTYPER_##readwrite##_CASE(5); \
> - PMEVTYPER_##readwrite##_CASE(6); \
> - PMEVTYPER_##readwrite##_CASE(7); \
> - PMEVTYPER_##readwrite##_CASE(8); \
> - PMEVTYPER_##readwrite##_CASE(9); \
> - PMEVTYPER_##readwrite##_CASE(10); \
> - PMEVTYPER_##readwrite##_CASE(11); \
> - PMEVTYPER_##readwrite##_CASE(12); \
> - PMEVTYPER_##readwrite##_CASE(13); \
> - PMEVTYPER_##readwrite##_CASE(14); \
> - PMEVTYPER_##readwrite##_CASE(15); \
> - PMEVTYPER_##readwrite##_CASE(16); \
> - PMEVTYPER_##readwrite##_CASE(17); \
> - PMEVTYPER_##readwrite##_CASE(18); \
> - PMEVTYPER_##readwrite##_CASE(19); \
> - PMEVTYPER_##readwrite##_CASE(20); \
> - PMEVTYPER_##readwrite##_CASE(21); \
> - PMEVTYPER_##readwrite##_CASE(22); \
> - PMEVTYPER_##readwrite##_CASE(23); \
> - PMEVTYPER_##readwrite##_CASE(24); \
> - PMEVTYPER_##readwrite##_CASE(25); \
> - PMEVTYPER_##readwrite##_CASE(26); \
> - PMEVTYPER_##readwrite##_CASE(27); \
> - PMEVTYPER_##readwrite##_CASE(28); \
> - PMEVTYPER_##readwrite##_CASE(29); \
> - PMEVTYPER_##readwrite##_CASE(30)
> -
> /*
> * Read a value direct from PMEVTYPER<idx> where idx is 0-30
> * or PMCCFILTR_EL0 where idx is ARMV8_PMU_CYCLE_IDX (31).
> */
> static u64 kvm_vcpu_pmu_read_evtype_direct(int idx)
> {
> - switch (idx) {
> - PMEVTYPER_CASES(READ);
> - case ARMV8_PMU_CYCLE_IDX:
> - return read_sysreg(pmccfiltr_el0);
> - default:
> - WARN_ON(1);
> - }
> + if (idx == ARMV8_PMU_CYCLE_IDX)
> + return read_pmccfiltr();
>
> - return 0;
> + return read_pmevtypern(idx);
> }
>
> /*
> @@ -127,14 +82,10 @@ static u64 kvm_vcpu_pmu_read_evtype_direct(int idx)
> */
> static void kvm_vcpu_pmu_write_evtype_direct(int idx, u32 val)
> {
> - switch (idx) {
> - PMEVTYPER_CASES(WRITE);
> - case ARMV8_PMU_CYCLE_IDX:
> - write_sysreg(val, pmccfiltr_el0);
> - break;
> - default:
> - WARN_ON(1);
> - }
> + if (idx == ARMV8_PMU_CYCLE_IDX)
> + write_pmccfiltr(val);
> + else
> + write_pmevtypern(idx, val);
> }
>
> /*
>
> --
> 2.43.0
>
next prev parent reply other threads:[~2024-06-10 11:02 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-07 20:31 [PATCH 0/9] arm64: Add support for Armv9.4 PMU fixed instruction counter Rob Herring (Arm)
2024-06-07 20:31 ` [PATCH 1/9] perf/arm: Move 32-bit PMU drivers to drivers/perf/ Rob Herring (Arm)
2024-06-10 9:23 ` Mark Rutland
2024-06-07 20:31 ` [PATCH 2/9] perf: arm_v6/7_pmu: Drop non-DT probe support Rob Herring (Arm)
2024-06-10 9:30 ` Mark Rutland
2024-06-07 20:31 ` [PATCH 3/9] perf: arm_pmu: Remove event index to counter remapping Rob Herring (Arm)
2024-06-08 19:37 ` kernel test robot
2024-06-10 10:44 ` Mark Rutland
2024-06-10 16:42 ` Rob Herring
2024-06-07 20:31 ` [PATCH 4/9] perf: arm_pmuv3: Prepare for more than 32 counters Rob Herring (Arm)
2024-06-10 10:51 ` Mark Rutland
2024-06-07 20:31 ` [PATCH 5/9] KVM: arm64: pmu: Use arm_pmuv3.h register accessors Rob Herring (Arm)
2024-06-10 11:02 ` Mark Rutland [this message]
2024-06-07 20:31 ` [PATCH 6/9] KVM: arm64: pmu: Use generated define for PMSELR_EL0.SEL access Rob Herring (Arm)
2024-06-10 11:10 ` Mark Rutland
2024-06-07 20:31 ` [PATCH 7/9] arm64: perf/kvm: Use a common PMU cycle counter define Rob Herring (Arm)
2024-06-10 11:24 ` Mark Rutland
2024-06-07 20:31 ` [PATCH 8/9] KVM: arm64: Refine PMU defines for number of counters Rob Herring (Arm)
2024-06-10 11:27 ` Mark Rutland
2024-06-07 20:31 ` [PATCH 9/9] perf: arm_pmuv3: Add support for Armv9.4 PMU instruction counter Rob Herring (Arm)
2024-06-10 11:55 ` Mark Rutland
2024-06-10 14:15 ` Rob Herring
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