From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Andi Kleen <ak@linux.intel.com>,
Eranian Stephane <eranian@google.com>,
linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
Dapeng Mi <dapeng1.mi@intel.com>, Zide Chen <zide.chen@intel.com>,
Falcon Thomas <thomas.falcon@intel.com>,
Xudong Hao <xudong.hao@intel.com>
Subject: Re: [Patch v9 10/12] perf/x86/intel: Update dyn_constranit base on PEBS event precise level
Date: Mon, 10 Nov 2025 08:23:55 +0800 [thread overview]
Message-ID: <a0416429-23d4-4f4f-af73-bcd87b4e773c@linux.intel.com> (raw)
In-Reply-To: <20251107130552.GB4067720@noisy.programming.kicks-ass.net>
On 11/7/2025 9:05 PM, Peter Zijlstra wrote:
> On Fri, Nov 07, 2025 at 02:11:09PM +0800, Mi, Dapeng wrote:
>> On 11/6/2025 10:52 PM, Peter Zijlstra wrote:
>>> On Wed, Oct 29, 2025 at 06:21:34PM +0800, Dapeng Mi wrote:
>>>> arch-PEBS provides CPUIDs to enumerate which counters support PEBS
>>>> sampling and precise distribution PEBS sampling. Thus PEBS constraints
>>>> should be dynamically configured base on these counter and precise
>>>> distribution bitmap instead of defining them statically.
>>>>
>>>> Update event dyn_constraint base on PEBS event precise level.
>>> What happened to this:
>>>
>>> https://lore.kernel.org/all/e0b25b3e-aec0-4c43-9ab2-907186b56c71@linux.intel.com/
>> About the issue, Kan ever posted a patch to mitigate the risk, but it seems
>> the patch is not merged yet.
>>
>> https://lore.kernel.org/all/20250512175542.2000708-1-kan.liang@linux.intel.com/
> IIUC the below is what is required handle this new dynamic case, right?
>
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -5423,6 +5423,8 @@ enum dyn_constr_type {
> DYN_CONSTR_BR_CNTR,
> DYN_CONSTR_ACR_CNTR,
> DYN_CONSTR_ACR_CAUSE,
> + DYN_CONSTR_PEBS,
> + DYN_CONSTR_PDIST,
>
> DYN_CONSTR_MAX,
> };
> @@ -5432,6 +5434,8 @@ static const char * const dyn_constr_typ
> [DYN_CONSTR_BR_CNTR] = "a branch counter logging event",
> [DYN_CONSTR_ACR_CNTR] = "an auto-counter reload event",
> [DYN_CONSTR_ACR_CAUSE] = "an auto-counter reload cause event",
> + [DYN_CONSTR_PEBS] = "a PEBS event",
> + [DYN_CONSTR_PDIST] = "a PEBS PDIST event",
> };
>
> static void __intel_pmu_check_dyn_constr(struct event_constraint *constr,
> @@ -5536,6 +5540,14 @@ static void intel_pmu_check_dyn_constr(s
> continue;
> mask = hybrid(pmu, acr_cause_mask64) & GENMASK_ULL(INTEL_PMC_MAX_GENERIC - 1, 0);
> break;
> + case DYN_CONSTR_PEBS:
> + if (x86_pmu.arch_pebs)
> + mask = hybrid(pmu, arch_pebs_cap).counters;
> + break;
> + case DYN_CONSTR_PDIST:
> + if (x86_pmu.arch_pebs)
> + mask = hybrid(pmu, arch_pebs_cap).pdists;
> + break;
> default:
> pr_warn("Unsupported dynamic constraint type %d\n", i);
> }
Yes, exactly. Thanks.
next prev parent reply other threads:[~2025-11-10 0:24 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-29 10:21 [Patch v9 00/12] arch-PEBS enabling for Intel platforms Dapeng Mi
2025-10-29 10:21 ` [Patch v9 01/12] perf/x86: Remove redundant is_x86_event() prototype Dapeng Mi
2025-10-29 10:21 ` [Patch v9 02/12] perf/x86: Fix NULL event access and potential PEBS record loss Dapeng Mi
2025-11-06 14:19 ` Peter Zijlstra
2025-10-29 10:21 ` [Patch v9 03/12] perf/x86/intel: Replace x86_pmu.drain_pebs calling with static call Dapeng Mi
2025-10-29 10:21 ` [Patch v9 04/12] perf/x86/intel: Correct large PEBS flag check Dapeng Mi
2025-10-29 10:21 ` [Patch v9 05/12] perf/x86/intel: Initialize architectural PEBS Dapeng Mi
2025-10-29 10:21 ` [Patch v9 06/12] perf/x86/intel/ds: Factor out PEBS record processing code to functions Dapeng Mi
2025-10-29 10:21 ` [Patch v9 07/12] perf/x86/intel/ds: Factor out PEBS group " Dapeng Mi
2025-10-29 10:21 ` [Patch v9 08/12] perf/x86/intel: Process arch-PEBS records or record fragments Dapeng Mi
2025-10-29 10:21 ` [Patch v9 09/12] perf/x86/intel: Allocate arch-PEBS buffer and initialize PEBS_BASE MSR Dapeng Mi
2025-10-29 10:21 ` [Patch v9 10/12] perf/x86/intel: Update dyn_constranit base on PEBS event precise level Dapeng Mi
2025-11-06 14:52 ` Peter Zijlstra
2025-11-07 6:11 ` Mi, Dapeng
2025-11-07 8:28 ` Peter Zijlstra
2025-11-07 8:36 ` Mi, Dapeng
2025-11-07 13:05 ` Peter Zijlstra
2025-11-10 0:23 ` Mi, Dapeng [this message]
2025-11-10 9:03 ` Peter Zijlstra
2025-11-10 9:15 ` Mi, Dapeng
2025-11-11 5:41 ` Mi, Dapeng
2025-11-11 11:37 ` Peter Zijlstra
2025-11-12 0:16 ` Mi, Dapeng
2025-10-29 10:21 ` [Patch v9 11/12] perf/x86/intel: Setup PEBS data configuration and enable legacy groups Dapeng Mi
2025-10-29 10:21 ` [Patch v9 12/12] perf/x86/intel: Add counter group support for arch-PEBS Dapeng Mi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=a0416429-23d4-4f4f-af73-bcd87b4e773c@linux.intel.com \
--to=dapeng1.mi@linux.intel.com \
--cc=acme@kernel.org \
--cc=adrian.hunter@intel.com \
--cc=ak@linux.intel.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=dapeng1.mi@intel.com \
--cc=eranian@google.com \
--cc=irogers@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-perf-users@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=namhyung@kernel.org \
--cc=peterz@infradead.org \
--cc=thomas.falcon@intel.com \
--cc=xudong.hao@intel.com \
--cc=zide.chen@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).