From: "Liang, Kan" <kan.liang@linux.intel.com>
To: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>,
Mingwei Zhang <mizhang@google.com>,
Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Xiong Zhang <xiong.y.zhang@intel.com>,
Kan Liang <kan.liang@intel.com>,
Zhenyu Wang <zhenyuw@linux.intel.com>,
Manali Shukla <manali.shukla@amd.com>,
Sandipan Das <sandipan.das@amd.com>
Cc: Jim Mattson <jmattson@google.com>,
Stephane Eranian <eranian@google.com>,
Ian Rogers <irogers@google.com>,
Namhyung Kim <namhyung@kernel.org>,
gce-passthrou-pmu-dev@google.com,
Samantha Alt <samantha.alt@intel.com>,
Zhiyuan Lv <zhiyuan.lv@intel.com>,
Yanfei Xu <yanfei.xu@intel.com>,
Like Xu <like.xu.linux@gmail.com>,
Peter Zijlstra <peterz@infradead.org>,
Raghavendra Rao Ananta <rananta@google.com>,
kvm@vger.kernel.org, linux-perf-users@vger.kernel.org
Subject: Re: [RFC PATCH v3 09/58] perf: Add a EVENT_GUEST flag
Date: Wed, 21 Aug 2024 09:16:43 -0400 [thread overview]
Message-ID: <a42f95cb-9f6a-4518-aac5-0d1b56f08b94@linux.intel.com> (raw)
In-Reply-To: <095522b1-faad-4544-9282-4dda8be03695@linux.intel.com>
On 2024-08-21 1:27 a.m., Mi, Dapeng wrote:
>
> On 8/1/2024 12:58 PM, Mingwei Zhang wrote:
>> From: Kan Liang <kan.liang@linux.intel.com>
>>
>> Current perf doesn't explicitly schedule out all exclude_guest events
>> while the guest is running. There is no problem with the current
>> emulated vPMU. Because perf owns all the PMU counters. It can mask the
>> counter which is assigned to an exclude_guest event when a guest is
>> running (Intel way), or set the corresponding HOSTONLY bit in evsentsel
>> (AMD way). The counter doesn't count when a guest is running.
>>
>> However, either way doesn't work with the introduced passthrough vPMU.
>> A guest owns all the PMU counters when it's running. The host should not
>> mask any counters. The counter may be used by the guest. The evsentsel
>> may be overwritten.
>>
>> Perf should explicitly schedule out all exclude_guest events to release
>> the PMU resources when entering a guest, and resume the counting when
>> exiting the guest.
>>
>> It's possible that an exclude_guest event is created when a guest is
>> running. The new event should not be scheduled in as well.
>>
>> The ctx time is shared among different PMUs. The time cannot be stopped
>> when a guest is running. It is required to calculate the time for events
>> from other PMUs, e.g., uncore events. Add timeguest to track the guest
>> run time. For an exclude_guest event, the elapsed time equals
>> the ctx time - guest time.
>> Cgroup has dedicated times. Use the same method to deduct the guest time
>> from the cgroup time as well.
>>
>> Co-developed-by: Peter Zijlstra (Intel) <peterz@infradead.org>
>> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
>> Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
>> Signed-off-by: Mingwei Zhang <mizhang@google.com>
>> ---
>> include/linux/perf_event.h | 6 ++
>> kernel/events/core.c | 178 +++++++++++++++++++++++++++++++------
>> 2 files changed, 155 insertions(+), 29 deletions(-)
>>
>> diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
>> index e22cdb6486e6..81a5f8399cb8 100644
>> --- a/include/linux/perf_event.h
>> +++ b/include/linux/perf_event.h
>> @@ -952,6 +952,11 @@ struct perf_event_context {
>> */
>> struct perf_time_ctx time;
>>
>> + /*
>> + * Context clock, runs when in the guest mode.
>> + */
>> + struct perf_time_ctx timeguest;
>> +
>> /*
>> * These fields let us detect when two contexts have both
>> * been cloned (inherited) from a common ancestor.
>> @@ -1044,6 +1049,7 @@ struct bpf_perf_event_data_kern {
>> */
>> struct perf_cgroup_info {
>> struct perf_time_ctx time;
>> + struct perf_time_ctx timeguest;
>> int active;
>> };
>>
>> diff --git a/kernel/events/core.c b/kernel/events/core.c
>> index c25e2bf27001..57648736e43e 100644
>> --- a/kernel/events/core.c
>> +++ b/kernel/events/core.c
>> @@ -376,7 +376,8 @@ enum event_type_t {
>> /* see ctx_resched() for details */
>> EVENT_CPU = 0x8,
>> EVENT_CGROUP = 0x10,
>> - EVENT_FLAGS = EVENT_CGROUP,
>> + EVENT_GUEST = 0x20,
>> + EVENT_FLAGS = EVENT_CGROUP | EVENT_GUEST,
>> EVENT_ALL = EVENT_FLEXIBLE | EVENT_PINNED,
>> };
>>
>> @@ -407,6 +408,7 @@ static atomic_t nr_include_guest_events __read_mostly;
>>
>> static atomic_t nr_mediated_pmu_vms;
>> static DEFINE_MUTEX(perf_mediated_pmu_mutex);
>> +static DEFINE_PER_CPU(bool, perf_in_guest);
>>
>> /* !exclude_guest event of PMU with PERF_PMU_CAP_PASSTHROUGH_VPMU */
>> static inline bool is_include_guest_event(struct perf_event *event)
>> @@ -706,6 +708,10 @@ static bool perf_skip_pmu_ctx(struct perf_event_pmu_context *pmu_ctx,
>> if ((event_type & EVENT_CGROUP) && !pmu_ctx->nr_cgroups)
>> return true;
>>
>> + if ((event_type & EVENT_GUEST) &&
>> + !(pmu_ctx->pmu->capabilities & PERF_PMU_CAP_PASSTHROUGH_VPMU))
>> + return true;
>> +
>> return false;
>> }
>>
>> @@ -770,12 +776,21 @@ static inline int is_cgroup_event(struct perf_event *event)
>> return event->cgrp != NULL;
>> }
>>
>> +static inline u64 __perf_event_time_ctx(struct perf_event *event,
>> + struct perf_time_ctx *time,
>> + struct perf_time_ctx *timeguest);
>> +
>> +static inline u64 __perf_event_time_ctx_now(struct perf_event *event,
>> + struct perf_time_ctx *time,
>> + struct perf_time_ctx *timeguest,
>> + u64 now);
>> +
>> static inline u64 perf_cgroup_event_time(struct perf_event *event)
>> {
>> struct perf_cgroup_info *t;
>>
>> t = per_cpu_ptr(event->cgrp->info, event->cpu);
>> - return t->time.time;
>> + return __perf_event_time_ctx(event, &t->time, &t->timeguest);
>> }
>>
>> static inline u64 perf_cgroup_event_time_now(struct perf_event *event, u64 now)
>> @@ -784,9 +799,9 @@ static inline u64 perf_cgroup_event_time_now(struct perf_event *event, u64 now)
>>
>> t = per_cpu_ptr(event->cgrp->info, event->cpu);
>> if (!__load_acquire(&t->active))
>> - return t->time.time;
>> - now += READ_ONCE(t->time.offset);
>> - return now;
>> + return __perf_event_time_ctx(event, &t->time, &t->timeguest);
>> +
>> + return __perf_event_time_ctx_now(event, &t->time, &t->timeguest, now);
>> }
>>
>> static inline void update_perf_time_ctx(struct perf_time_ctx *time, u64 now, bool adv);
>> @@ -796,6 +811,18 @@ static inline void __update_cgrp_time(struct perf_cgroup_info *info, u64 now, bo
>> update_perf_time_ctx(&info->time, now, adv);
>> }
>>
>> +static inline void __update_cgrp_guest_time(struct perf_cgroup_info *info, u64 now, bool adv)
>> +{
>> + update_perf_time_ctx(&info->timeguest, now, adv);
>> +}
>> +
>> +static inline void update_cgrp_time(struct perf_cgroup_info *info, u64 now)
>> +{
>> + __update_cgrp_time(info, now, true);
>> + if (__this_cpu_read(perf_in_guest))
>> + __update_cgrp_guest_time(info, now, true);
>> +}
>> +
>> static inline void update_cgrp_time_from_cpuctx(struct perf_cpu_context *cpuctx, bool final)
>> {
>> struct perf_cgroup *cgrp = cpuctx->cgrp;
>> @@ -809,7 +836,7 @@ static inline void update_cgrp_time_from_cpuctx(struct perf_cpu_context *cpuctx,
>> cgrp = container_of(css, struct perf_cgroup, css);
>> info = this_cpu_ptr(cgrp->info);
>>
>> - __update_cgrp_time(info, now, true);
>> + update_cgrp_time(info, now);
>> if (final)
>> __store_release(&info->active, 0);
>> }
>> @@ -832,11 +859,11 @@ static inline void update_cgrp_time_from_event(struct perf_event *event)
>> * Do not update time when cgroup is not active
>> */
>> if (info->active)
>> - __update_cgrp_time(info, perf_clock(), true);
>> + update_cgrp_time(info, perf_clock());
>> }
>>
>> static inline void
>> -perf_cgroup_set_timestamp(struct perf_cpu_context *cpuctx)
>> +perf_cgroup_set_timestamp(struct perf_cpu_context *cpuctx, bool guest)
>> {
>> struct perf_event_context *ctx = &cpuctx->ctx;
>> struct perf_cgroup *cgrp = cpuctx->cgrp;
>> @@ -856,8 +883,12 @@ perf_cgroup_set_timestamp(struct perf_cpu_context *cpuctx)
>> for (css = &cgrp->css; css; css = css->parent) {
>> cgrp = container_of(css, struct perf_cgroup, css);
>> info = this_cpu_ptr(cgrp->info);
>> - __update_cgrp_time(info, ctx->time.stamp, false);
>> - __store_release(&info->active, 1);
>> + if (guest) {
>> + __update_cgrp_guest_time(info, ctx->time.stamp, false);
>> + } else {
>> + __update_cgrp_time(info, ctx->time.stamp, false);
>> + __store_release(&info->active, 1);
>> + }
>> }
>> }
>>
>> @@ -1061,7 +1092,7 @@ static inline int perf_cgroup_connect(pid_t pid, struct perf_event *event,
>> }
>>
>> static inline void
>> -perf_cgroup_set_timestamp(struct perf_cpu_context *cpuctx)
>> +perf_cgroup_set_timestamp(struct perf_cpu_context *cpuctx, bool guest)
>> {
>> }
>>
>> @@ -1488,16 +1519,34 @@ static inline void update_perf_time_ctx(struct perf_time_ctx *time, u64 now, boo
>> */
>> static void __update_context_time(struct perf_event_context *ctx, bool adv)
>> {
>> - u64 now = perf_clock();
>> + lockdep_assert_held(&ctx->lock);
>> +
>> + update_perf_time_ctx(&ctx->time, perf_clock(), adv);
>> +}
>>
>> +static void __update_context_guest_time(struct perf_event_context *ctx, bool adv)
>> +{
>> lockdep_assert_held(&ctx->lock);
>>
>> - update_perf_time_ctx(&ctx->time, now, adv);
>> + /* must be called after __update_context_time(); */
>> + update_perf_time_ctx(&ctx->timeguest, ctx->time.stamp, adv);
>> }
>>
>> static void update_context_time(struct perf_event_context *ctx)
>> {
>> __update_context_time(ctx, true);
>> + if (__this_cpu_read(perf_in_guest))
>> + __update_context_guest_time(ctx, true);
>> +}
>> +
>> +static inline u64 __perf_event_time_ctx(struct perf_event *event,
>> + struct perf_time_ctx *time,
>> + struct perf_time_ctx *timeguest)
>> +{
>> + if (event->attr.exclude_guest)
>> + return time->time - timeguest->time;
>> + else
>> + return time->time;
>> }
>>
>> static u64 perf_event_time(struct perf_event *event)
>> @@ -1510,7 +1559,26 @@ static u64 perf_event_time(struct perf_event *event)
>> if (is_cgroup_event(event))
>> return perf_cgroup_event_time(event);
>>
>> - return ctx->time.time;
>> + return __perf_event_time_ctx(event, &ctx->time, &ctx->timeguest);
>> +}
>> +
>> +static inline u64 __perf_event_time_ctx_now(struct perf_event *event,
>> + struct perf_time_ctx *time,
>> + struct perf_time_ctx *timeguest,
>> + u64 now)
>> +{
>> + /*
>> + * The exclude_guest event time should be calculated from
>> + * the ctx time - the guest time.
>> + * The ctx time is now + READ_ONCE(time->offset).
>> + * The guest time is now + READ_ONCE(timeguest->offset).
>> + * So the exclude_guest time is
>> + * READ_ONCE(time->offset) - READ_ONCE(timeguest->offset).
>> + */
>> + if (event->attr.exclude_guest && __this_cpu_read(perf_in_guest))
>
> Hi Kan,
>
> we see the following the warning when run perf record command after
> enabling "CONFIG_DEBUG_PREEMPT" config item.
>
> [ 166.779208] BUG: using __this_cpu_read() in preemptible [00000000] code:
> perf/9494
> [ 166.779234] caller is __this_cpu_preempt_check+0x13/0x20
> [ 166.779241] CPU: 56 UID: 0 PID: 9494 Comm: perf Not tainted
> 6.11.0-rc4-perf-next-mediated-vpmu-v3+ #80
> [ 166.779245] Hardware name: Quanta Cloud Technology Inc. QuantaGrid
> D54Q-2U/S6Q-MB-MPS, BIOS 3A11.uh 12/02/2022
> [ 166.779248] Call Trace:
> [ 166.779250] <TASK>
> [ 166.779252] dump_stack_lvl+0x76/0xa0
> [ 166.779260] dump_stack+0x10/0x20
> [ 166.779267] check_preemption_disabled+0xd7/0xf0
> [ 166.779273] __this_cpu_preempt_check+0x13/0x20
> [ 166.779279] calc_timer_values+0x193/0x200
> [ 166.779287] perf_event_update_userpage+0x4b/0x170
> [ 166.779294] ? ring_buffer_attach+0x14c/0x200
> [ 166.779301] perf_mmap+0x533/0x5d0
> [ 166.779309] mmap_region+0x243/0xaa0
> [ 166.779322] do_mmap+0x35b/0x640
> [ 166.779333] vm_mmap_pgoff+0xf0/0x1c0
> [ 166.779345] ksys_mmap_pgoff+0x17a/0x250
> [ 166.779354] __x64_sys_mmap+0x33/0x70
> [ 166.779362] x64_sys_call+0x1fa4/0x25f0
> [ 166.779369] do_syscall_64+0x70/0x130
>
> The season that kernel complains this is __perf_event_time_ctx_now() calls
> __this_cpu_read() in preemption enabled context.
>
> To eliminate the warning, we may need to use this_cpu_read() to replace
> __this_cpu_read().
Sure.
Besides this, we recently update the time related code in perf.
https://lore.kernel.org/lkml/172311312757.2215.323044538405607858.tip-bot2@tip-bot2/
This patch probably have to be rebased on top of it.
Thanks,
Kan
>
> diff --git a/kernel/events/core.c b/kernel/events/core.c
> index ccd61fd06e8d..1eb628f8b3a0 100644
> --- a/kernel/events/core.c
> +++ b/kernel/events/core.c
> @@ -1581,7 +1581,7 @@ static inline u64 __perf_event_time_ctx_now(struct
> perf_event *event,
> * So the exclude_guest time is
> * READ_ONCE(time->offset) - READ_ONCE(timeguest->offset).
> */
> - if (event->attr.exclude_guest && __this_cpu_read(perf_in_guest))
> + if (event->attr.exclude_guest && this_cpu_read(perf_in_guest))
> return READ_ONCE(time->offset) - READ_ONCE(timeguest->offset);
> else
> return now + READ_ONCE(time->offset);
>
>> + return READ_ONCE(time->offset) - READ_ONCE(timeguest->offset);
>> + else
>> + return now + READ_ONCE(time->offset);
>> }
>>
>> static u64 perf_event_time_now(struct perf_event *event, u64 now)
>> @@ -1524,10 +1592,9 @@ static u64 perf_event_time_now(struct perf_event *event, u64 now)
>> return perf_cgroup_event_time_now(event, now);
>>
>> if (!(__load_acquire(&ctx->is_active) & EVENT_TIME))
>> - return ctx->time.time;
>> + return __perf_event_time_ctx(event, &ctx->time, &ctx->timeguest);
>>
>> - now += READ_ONCE(ctx->time.offset);
>> - return now;
>> + return __perf_event_time_ctx_now(event, &ctx->time, &ctx->timeguest, now);
>> }
>>
>> static enum event_type_t get_event_type(struct perf_event *event)
>> @@ -3334,9 +3401,15 @@ ctx_sched_out(struct perf_event_context *ctx, enum event_type_t event_type)
>> * would only update time for the pinned events.
>> */
>> if (is_active & EVENT_TIME) {
>> + bool stop;
>> +
>> + /* vPMU should not stop time */
>> + stop = !(event_type & EVENT_GUEST) &&
>> + ctx == &cpuctx->ctx;
>> +
>> /* update (and stop) ctx time */
>> update_context_time(ctx);
>> - update_cgrp_time_from_cpuctx(cpuctx, ctx == &cpuctx->ctx);
>> + update_cgrp_time_from_cpuctx(cpuctx, stop);
>> /*
>> * CPU-release for the below ->is_active store,
>> * see __load_acquire() in perf_event_time_now()
>> @@ -3354,7 +3427,18 @@ ctx_sched_out(struct perf_event_context *ctx, enum event_type_t event_type)
>> cpuctx->task_ctx = NULL;
>> }
>>
>> - is_active ^= ctx->is_active; /* changed bits */
>> + if (event_type & EVENT_GUEST) {
>> + /*
>> + * Schedule out all !exclude_guest events of PMU
>> + * with PERF_PMU_CAP_PASSTHROUGH_VPMU.
>> + */
>> + is_active = EVENT_ALL;
>> + __update_context_guest_time(ctx, false);
>> + perf_cgroup_set_timestamp(cpuctx, true);
>> + barrier();
>> + } else {
>> + is_active ^= ctx->is_active; /* changed bits */
>> + }
>>
>> list_for_each_entry(pmu_ctx, &ctx->pmu_ctx_list, pmu_ctx_entry) {
>> if (perf_skip_pmu_ctx(pmu_ctx, event_type))
>> @@ -3853,10 +3937,15 @@ static inline void group_update_userpage(struct perf_event *group_event)
>> event_update_userpage(event);
>> }
>>
>> +struct merge_sched_data {
>> + int can_add_hw;
>> + enum event_type_t event_type;
>> +};
>> +
>> static int merge_sched_in(struct perf_event *event, void *data)
>> {
>> struct perf_event_context *ctx = event->ctx;
>> - int *can_add_hw = data;
>> + struct merge_sched_data *msd = data;
>>
>> if (event->state <= PERF_EVENT_STATE_OFF)
>> return 0;
>> @@ -3864,13 +3953,22 @@ static int merge_sched_in(struct perf_event *event, void *data)
>> if (!event_filter_match(event))
>> return 0;
>>
>> - if (group_can_go_on(event, *can_add_hw)) {
>> + /*
>> + * Don't schedule in any exclude_guest events of PMU with
>> + * PERF_PMU_CAP_PASSTHROUGH_VPMU, while a guest is running.
>> + */
>> + if (__this_cpu_read(perf_in_guest) && event->attr.exclude_guest &&
>> + event->pmu->capabilities & PERF_PMU_CAP_PASSTHROUGH_VPMU &&
>> + !(msd->event_type & EVENT_GUEST))
>> + return 0;
>> +
>> + if (group_can_go_on(event, msd->can_add_hw)) {
>> if (!group_sched_in(event, ctx))
>> list_add_tail(&event->active_list, get_event_list(event));
>> }
>>
>> if (event->state == PERF_EVENT_STATE_INACTIVE) {
>> - *can_add_hw = 0;
>> + msd->can_add_hw = 0;
>> if (event->attr.pinned) {
>> perf_cgroup_event_disable(event, ctx);
>> perf_event_set_state(event, PERF_EVENT_STATE_ERROR);
>> @@ -3889,11 +3987,15 @@ static int merge_sched_in(struct perf_event *event, void *data)
>>
>> static void pmu_groups_sched_in(struct perf_event_context *ctx,
>> struct perf_event_groups *groups,
>> - struct pmu *pmu)
>> + struct pmu *pmu,
>> + enum event_type_t event_type)
>> {
>> - int can_add_hw = 1;
>> + struct merge_sched_data msd = {
>> + .can_add_hw = 1,
>> + .event_type = event_type,
>> + };
>> visit_groups_merge(ctx, groups, smp_processor_id(), pmu,
>> - merge_sched_in, &can_add_hw);
>> + merge_sched_in, &msd);
>> }
>>
>> static void ctx_groups_sched_in(struct perf_event_context *ctx,
>> @@ -3905,14 +4007,14 @@ static void ctx_groups_sched_in(struct perf_event_context *ctx,
>> list_for_each_entry(pmu_ctx, &ctx->pmu_ctx_list, pmu_ctx_entry) {
>> if (perf_skip_pmu_ctx(pmu_ctx, event_type))
>> continue;
>> - pmu_groups_sched_in(ctx, groups, pmu_ctx->pmu);
>> + pmu_groups_sched_in(ctx, groups, pmu_ctx->pmu, event_type);
>> }
>> }
>>
>> static void __pmu_ctx_sched_in(struct perf_event_context *ctx,
>> struct pmu *pmu)
>> {
>> - pmu_groups_sched_in(ctx, &ctx->flexible_groups, pmu);
>> + pmu_groups_sched_in(ctx, &ctx->flexible_groups, pmu, 0);
>> }
>>
>> static void
>> @@ -3927,9 +4029,11 @@ ctx_sched_in(struct perf_event_context *ctx, enum event_type_t event_type)
>> return;
>>
>> if (!(is_active & EVENT_TIME)) {
>> + /* EVENT_TIME should be active while the guest runs */
>> + WARN_ON_ONCE(event_type & EVENT_GUEST);
>> /* start ctx time */
>> __update_context_time(ctx, false);
>> - perf_cgroup_set_timestamp(cpuctx);
>> + perf_cgroup_set_timestamp(cpuctx, false);
>> /*
>> * CPU-release for the below ->is_active store,
>> * see __load_acquire() in perf_event_time_now()
>> @@ -3945,7 +4049,23 @@ ctx_sched_in(struct perf_event_context *ctx, enum event_type_t event_type)
>> WARN_ON_ONCE(cpuctx->task_ctx != ctx);
>> }
>>
>> - is_active ^= ctx->is_active; /* changed bits */
>> + if (event_type & EVENT_GUEST) {
>> + /*
>> + * Schedule in all !exclude_guest events of PMU
>> + * with PERF_PMU_CAP_PASSTHROUGH_VPMU.
>> + */
>> + is_active = EVENT_ALL;
>> +
>> + /*
>> + * Update ctx time to set the new start time for
>> + * the exclude_guest events.
>> + */
>> + update_context_time(ctx);
>> + update_cgrp_time_from_cpuctx(cpuctx, false);
>> + barrier();
>> + } else {
>> + is_active ^= ctx->is_active; /* changed bits */
>> + }
>>
>> /*
>> * First go through the list and put on any pinned groups
>
next prev parent reply other threads:[~2024-08-21 13:16 UTC|newest]
Thread overview: 183+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-01 4:58 [RFC PATCH v3 00/58] Mediated Passthrough vPMU 3.0 for x86 Mingwei Zhang
2024-08-01 4:58 ` [RFC PATCH v3 01/58] sched/core: Move preempt_model_*() helpers from sched.h to preempt.h Mingwei Zhang
2024-08-01 4:58 ` [RFC PATCH v3 02/58] sched/core: Drop spinlocks on contention iff kernel is preemptible Mingwei Zhang
2024-08-01 4:58 ` [RFC PATCH v3 03/58] perf/x86: Do not set bit width for unavailable counters Mingwei Zhang
2024-08-01 4:58 ` [RFC PATCH v3 04/58] x86/msr: Define PerfCntrGlobalStatusSet register Mingwei Zhang
2024-08-01 4:58 ` [RFC PATCH v3 05/58] x86/msr: Introduce MSR_CORE_PERF_GLOBAL_STATUS_SET Mingwei Zhang
2024-08-01 4:58 ` [RFC PATCH v3 06/58] perf: Support get/put passthrough PMU interfaces Mingwei Zhang
2024-09-06 10:59 ` Mi, Dapeng
2024-09-06 15:40 ` Liang, Kan
2024-09-09 22:17 ` Namhyung Kim
2024-08-01 4:58 ` [RFC PATCH v3 07/58] perf: Skip pmu_ctx based on event_type Mingwei Zhang
2024-10-11 11:18 ` Peter Zijlstra
2024-08-01 4:58 ` [RFC PATCH v3 08/58] perf: Clean up perf ctx time Mingwei Zhang
2024-10-11 11:39 ` Peter Zijlstra
2024-08-01 4:58 ` [RFC PATCH v3 09/58] perf: Add a EVENT_GUEST flag Mingwei Zhang
2024-08-21 5:27 ` Mi, Dapeng
2024-08-21 13:16 ` Liang, Kan [this message]
2024-10-11 11:41 ` Peter Zijlstra
2024-10-11 13:16 ` Liang, Kan
2024-10-11 18:42 ` Peter Zijlstra
2024-10-11 19:49 ` Liang, Kan
2024-10-14 10:55 ` Peter Zijlstra
2024-10-14 11:14 ` Peter Zijlstra
2024-10-14 15:06 ` Liang, Kan
2024-12-13 9:37 ` Sandipan Das
2024-12-13 16:26 ` Liang, Kan
2024-08-01 4:58 ` [RFC PATCH v3 10/58] perf: Add generic exclude_guest support Mingwei Zhang
2024-10-14 11:20 ` Peter Zijlstra
2024-10-14 15:27 ` Liang, Kan
2024-08-01 4:58 ` [RFC PATCH v3 11/58] x86/irq: Factor out common code for installing kvm irq handler Mingwei Zhang
2024-08-01 4:58 ` [RFC PATCH v3 12/58] perf: core/x86: Register a new vector for KVM GUEST PMI Mingwei Zhang
2024-09-09 22:11 ` Colton Lewis
2024-09-10 4:59 ` Mi, Dapeng
2024-09-10 16:45 ` Colton Lewis
2024-08-01 4:58 ` [RFC PATCH v3 13/58] KVM: x86/pmu: Register KVM_GUEST_PMI_VECTOR handler Mingwei Zhang
2024-08-01 4:58 ` [RFC PATCH v3 14/58] perf: Add switch_interrupt() interface Mingwei Zhang
2024-09-19 6:02 ` Manali Shukla
2024-09-19 13:00 ` Liang, Kan
2024-09-20 5:09 ` Manali Shukla
2024-09-23 18:49 ` Mingwei Zhang
2024-09-24 16:55 ` Manali Shukla
2024-10-14 11:59 ` Peter Zijlstra
2024-10-14 16:15 ` Liang, Kan
2024-10-14 17:45 ` Peter Zijlstra
2024-10-15 15:59 ` Liang, Kan
2024-10-14 11:56 ` Peter Zijlstra
2024-10-14 15:40 ` Liang, Kan
2024-10-14 17:47 ` Peter Zijlstra
2024-10-14 17:51 ` Peter Zijlstra
2024-10-14 12:03 ` Peter Zijlstra
2024-10-14 15:51 ` Liang, Kan
2024-10-14 17:49 ` Peter Zijlstra
2024-10-15 13:23 ` Liang, Kan
2024-10-14 13:52 ` Peter Zijlstra
2024-10-14 15:57 ` Liang, Kan
2024-08-01 4:58 ` [RFC PATCH v3 15/58] perf/x86: Support switch_interrupt interface Mingwei Zhang
2024-09-09 22:11 ` Colton Lewis
2024-09-10 5:00 ` Mi, Dapeng
2024-10-24 19:45 ` Chen, Zide
2024-10-25 0:52 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 16/58] perf/x86: Forbid PMI handler when guest own PMU Mingwei Zhang
2024-09-02 7:56 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 17/58] perf: core/x86: Plumb passthrough PMU capability from x86_pmu to x86_pmu_cap Mingwei Zhang
2024-08-01 4:58 ` [RFC PATCH v3 18/58] KVM: x86/pmu: Introduce enable_passthrough_pmu module parameter Mingwei Zhang
2024-11-19 14:30 ` Sean Christopherson
2024-11-20 3:21 ` Mi, Dapeng
2024-11-20 17:06 ` Sean Christopherson
2025-01-15 0:17 ` Mingwei Zhang
2025-01-15 2:52 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 19/58] KVM: x86/pmu: Plumb through pass-through PMU to vcpu for Intel CPUs Mingwei Zhang
2024-11-19 14:54 ` Sean Christopherson
2024-11-20 3:47 ` Mi, Dapeng
2024-11-20 16:45 ` Sean Christopherson
2024-11-21 0:29 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 20/58] KVM: x86/pmu: Always set global enable bits in passthrough mode Mingwei Zhang
2024-11-19 15:37 ` Sean Christopherson
2024-11-20 5:19 ` Mi, Dapeng
2024-11-20 17:09 ` Sean Christopherson
2024-11-21 0:37 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 21/58] KVM: x86/pmu: Add a helper to check if passthrough PMU is enabled Mingwei Zhang
2024-08-01 4:58 ` [RFC PATCH v3 22/58] KVM: x86/pmu: Add host_perf_cap and initialize it in kvm_x86_vendor_init() Mingwei Zhang
2024-11-19 15:43 ` Sean Christopherson
2024-11-20 5:21 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 23/58] KVM: x86/pmu: Allow RDPMC pass through when all counters exposed to guest Mingwei Zhang
2024-11-19 16:32 ` Sean Christopherson
2024-11-20 5:31 ` Mi, Dapeng
2025-01-22 5:08 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 24/58] KVM: x86/pmu: Introduce macro PMU_CAP_PERF_METRICS Mingwei Zhang
2024-11-19 17:03 ` Sean Christopherson
2024-11-20 5:44 ` Mi, Dapeng
2024-11-20 17:21 ` Sean Christopherson
2024-08-01 4:58 ` [RFC PATCH v3 25/58] KVM: x86/pmu: Introduce PMU operator to check if rdpmc passthrough allowed Mingwei Zhang
2024-11-19 17:32 ` Sean Christopherson
2024-11-20 6:22 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 26/58] KVM: x86/pmu: Manage MSR interception for IA32_PERF_GLOBAL_CTRL Mingwei Zhang
2024-08-06 7:04 ` Mi, Dapeng
2024-10-24 20:26 ` Chen, Zide
2024-10-25 2:36 ` Mi, Dapeng
2024-11-19 18:16 ` Sean Christopherson
2024-11-20 7:56 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 27/58] KVM: x86/pmu: Create a function prototype to disable MSR interception Mingwei Zhang
2024-10-24 19:58 ` Chen, Zide
2024-10-25 2:50 ` Mi, Dapeng
2024-11-19 18:17 ` Sean Christopherson
2024-11-20 7:57 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 28/58] KVM: x86/pmu: Add intel_passthrough_pmu_msrs() to pass-through PMU MSRs Mingwei Zhang
2024-11-19 18:24 ` Sean Christopherson
2024-11-20 10:12 ` Mi, Dapeng
2024-11-20 18:32 ` Sean Christopherson
2024-08-01 4:58 ` [RFC PATCH v3 29/58] KVM: x86/pmu: Avoid legacy vPMU code when accessing global_ctrl in passthrough vPMU Mingwei Zhang
2024-08-01 4:58 ` [RFC PATCH v3 30/58] KVM: x86/pmu: Exclude PMU MSRs in vmx_get_passthrough_msr_slot() Mingwei Zhang
2024-09-02 7:51 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 31/58] KVM: x86/pmu: Add counter MSR and selector MSR index into struct kvm_pmc Mingwei Zhang
2024-11-19 18:58 ` Sean Christopherson
2024-11-20 11:50 ` Mi, Dapeng
2024-11-20 17:30 ` Sean Christopherson
2024-11-21 0:56 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 32/58] KVM: x86/pmu: Introduce PMU operation prototypes for save/restore PMU context Mingwei Zhang
2024-08-01 4:58 ` [RFC PATCH v3 33/58] KVM: x86/pmu: Implement the save/restore of PMU state for Intel CPU Mingwei Zhang
2024-08-06 7:27 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 34/58] KVM: x86/pmu: Make check_pmu_event_filter() an exported function Mingwei Zhang
2024-08-01 4:58 ` [RFC PATCH v3 35/58] KVM: x86/pmu: Allow writing to event selector for GP counters if event is allowed Mingwei Zhang
2024-08-01 4:58 ` [RFC PATCH v3 36/58] KVM: x86/pmu: Allow writing to fixed counter selector if counter is exposed Mingwei Zhang
2024-09-02 7:59 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 37/58] KVM: x86/pmu: Switch IA32_PERF_GLOBAL_CTRL at VM boundary Mingwei Zhang
2024-10-24 20:26 ` Chen, Zide
2024-10-25 2:51 ` Mi, Dapeng
2024-11-19 1:46 ` Sean Christopherson
2024-11-19 5:20 ` Mi, Dapeng
2024-11-19 13:44 ` Sean Christopherson
2024-11-20 2:08 ` Mi, Dapeng
2024-10-31 3:14 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 38/58] KVM: x86/pmu: Exclude existing vLBR logic from the passthrough PMU Mingwei Zhang
2024-11-20 18:42 ` Sean Christopherson
2024-11-21 1:13 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 39/58] KVM: x86/pmu: Notify perf core at KVM context switch boundary Mingwei Zhang
2024-08-01 4:58 ` [RFC PATCH v3 40/58] KVM: x86/pmu: Grab x86 core PMU for passthrough PMU VM Mingwei Zhang
2024-11-20 18:46 ` Sean Christopherson
2024-11-21 2:04 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 41/58] KVM: x86/pmu: Add support for PMU context switch at VM-exit/enter Mingwei Zhang
2024-10-24 19:57 ` Chen, Zide
2024-10-25 2:55 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 42/58] KVM: x86/pmu: Introduce PMU operator to increment counter Mingwei Zhang
2024-08-01 4:58 ` [RFC PATCH v3 43/58] KVM: x86/pmu: Introduce PMU operator for setting counter overflow Mingwei Zhang
2024-10-25 16:16 ` Chen, Zide
2024-10-27 12:06 ` Mi, Dapeng
2024-11-20 18:48 ` Sean Christopherson
2024-11-21 2:05 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 44/58] KVM: x86/pmu: Implement emulated counter increment for passthrough PMU Mingwei Zhang
2024-11-20 20:13 ` Sean Christopherson
2024-11-21 2:27 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 45/58] KVM: x86/pmu: Update pmc_{read,write}_counter() to disconnect perf API Mingwei Zhang
2024-11-20 20:19 ` Sean Christopherson
2024-11-21 2:52 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 46/58] KVM: x86/pmu: Disconnect counter reprogram logic from passthrough PMU Mingwei Zhang
2024-11-20 20:40 ` Sean Christopherson
2024-11-21 3:02 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 47/58] KVM: nVMX: Add nested virtualization support for " Mingwei Zhang
2024-11-20 20:52 ` Sean Christopherson
2024-11-21 3:14 ` Mi, Dapeng
2024-08-01 4:58 ` [RFC PATCH v3 48/58] perf/x86/intel: Support PERF_PMU_CAP_PASSTHROUGH_VPMU Mingwei Zhang
2024-08-02 17:50 ` Liang, Kan
2024-08-01 4:58 ` [RFC PATCH v3 49/58] KVM: x86/pmu/svm: Set passthrough capability for vcpus Mingwei Zhang
2024-08-01 4:58 ` [RFC PATCH v3 50/58] KVM: x86/pmu/svm: Set enable_passthrough_pmu module parameter Mingwei Zhang
2024-08-01 4:59 ` [RFC PATCH v3 51/58] KVM: x86/pmu/svm: Allow RDPMC pass through when all counters exposed to guest Mingwei Zhang
2024-08-01 4:59 ` [RFC PATCH v3 52/58] KVM: x86/pmu/svm: Implement callback to disable MSR interception Mingwei Zhang
2024-11-20 21:02 ` Sean Christopherson
2024-11-21 3:24 ` Mi, Dapeng
2024-08-01 4:59 ` [RFC PATCH v3 53/58] KVM: x86/pmu/svm: Set GuestOnly bit and clear HostOnly bit when guest write to event selectors Mingwei Zhang
2024-11-20 21:38 ` Sean Christopherson
2024-11-21 3:26 ` Mi, Dapeng
2024-08-01 4:59 ` [RFC PATCH v3 54/58] KVM: x86/pmu/svm: Add registers to direct access list Mingwei Zhang
2024-08-01 4:59 ` [RFC PATCH v3 55/58] KVM: x86/pmu/svm: Implement handlers to save and restore context Mingwei Zhang
2024-08-01 4:59 ` [RFC PATCH v3 56/58] KVM: x86/pmu/svm: Wire up PMU filtering functionality for passthrough PMU Mingwei Zhang
2024-11-20 21:39 ` Sean Christopherson
2024-11-21 3:29 ` Mi, Dapeng
2024-08-01 4:59 ` [RFC PATCH v3 57/58] KVM: x86/pmu/svm: Implement callback to increment counters Mingwei Zhang
2024-08-01 4:59 ` [RFC PATCH v3 58/58] perf/x86/amd: Support PERF_PMU_CAP_PASSTHROUGH_VPMU for AMD host Mingwei Zhang
2024-09-11 10:45 ` [RFC PATCH v3 00/58] Mediated Passthrough vPMU 3.0 for x86 Ma, Yongwei
2024-11-19 14:00 ` Sean Christopherson
2024-11-20 2:31 ` Mi, Dapeng
2024-11-20 11:55 ` Mi, Dapeng
2024-11-20 18:34 ` Sean Christopherson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=a42f95cb-9f6a-4518-aac5-0d1b56f08b94@linux.intel.com \
--to=kan.liang@linux.intel.com \
--cc=dapeng1.mi@linux.intel.com \
--cc=eranian@google.com \
--cc=gce-passthrou-pmu-dev@google.com \
--cc=irogers@google.com \
--cc=jmattson@google.com \
--cc=kan.liang@intel.com \
--cc=kvm@vger.kernel.org \
--cc=like.xu.linux@gmail.com \
--cc=linux-perf-users@vger.kernel.org \
--cc=manali.shukla@amd.com \
--cc=mizhang@google.com \
--cc=namhyung@kernel.org \
--cc=pbonzini@redhat.com \
--cc=peterz@infradead.org \
--cc=rananta@google.com \
--cc=samantha.alt@intel.com \
--cc=sandipan.das@amd.com \
--cc=seanjc@google.com \
--cc=xiong.y.zhang@intel.com \
--cc=yanfei.xu@intel.com \
--cc=zhenyuw@linux.intel.com \
--cc=zhiyuan.lv@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).