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([2001:b07:add:ec09:c399:bc87:7b6c:fb2a]) by smtp.googlemail.com with ESMTPSA id d7-20020aa7ce07000000b004589da5e5cesm6056704edv.41.2022.11.02.10.18.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 02 Nov 2022 10:18:37 -0700 (PDT) Message-ID: Date: Wed, 2 Nov 2022 18:18:36 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.0 Subject: Re: [PATCH v5 0/8] KVM: x86: Intel LBR related perf cleanups Content-Language: en-US To: Sean Christopherson , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo Cc: Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Like Xu References: <20221006000314.73240-1-seanjc@google.com> From: Paolo Bonzini In-Reply-To: <20221006000314.73240-1-seanjc@google.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-perf-users@vger.kernel.org On 10/6/22 02:03, Sean Christopherson wrote: > PeterZ, I dropped your ACK from v4 because the perf patches were completely > broken. > > Fix a bug where KVM incorrectly advertises PMU_CAP_LBR_FMT to userspace if > perf has disabled LBRs, e.g. because probing one or more LBR MSRs during > setup hit a #GP. > > The non-KVM patch cleans up a KVM-specific perf API to fix a benign bug > where KVM ignores the error return from the API. > > The remaining patches clean up KVM's PERF_CAPABILITIES mess, which makes > everything far more complex than it needs to be by > > v5: > - Drop perf patches that removed stubs. The stubs are sadly necessary > when CPU_SUP_INTEL=n && KVM_INTEL={m,y}, which is possible due to > KVM_INTEL effectively depending on INTEL || CENTAUR || ZHAOXIN. > [hint provided by kernel test robot]. > - Add a patch to ignore guest CPUID on host userspace MSR writes. > - Add supported PERF_CAPABILITIES to kvm_caps to simplify code for all > parties. > > v4 > - https://lore.kernel.org/all/20220901173258.925729-1-seanjc@google.com: > - Make vmx_get_perf_capabilities() non-inline to avoid references to > x86_perf_get_lbr() when CPU_SUP_INTEL=n. [kernel test robot] > > v3: > - https://lore.kernel.org/all/20220831000051.4015031-1-seanjc@google.com > - Drop patches for bug #1 (already merged). > - Drop misguided "clean up the capability check" patch. [Like] > > v2: > - https://lore.kernel.org/all/20220803192658.860033-1-seanjc@google.com > - Add patches to fix bug #2. [Like] > - Add a patch to clean up the capability check. > - Tweak the changelog for the PMU refresh bug fix to call out that > KVM should disallow changing feature MSRs after KVM_RUN. [Like] > > v1: https://lore.kernel.org/all/20220727233424.2968356-1-seanjc@google.com > > Sean Christopherson (8): > perf/x86/core: Zero @lbr instead of returning -1 in x86_perf_get_lbr() > stub > KVM: VMX: Advertise PMU LBRs if and only if perf supports LBRs > KVM: VMX: Fold vmx_supported_debugctl() into vcpu_supported_debugctl() > KVM: VMX: Ignore guest CPUID for host userspace writes to DEBUGCTL > KVM: x86: Track supported PERF_CAPABILITIES in kvm_caps > KVM: x86: Init vcpu->arch.perf_capabilities in common x86 code > KVM: x86: Handle PERF_CAPABILITIES in common x86's > kvm_get_msr_feature() > KVM: x86: Directly query supported PERF_CAPABILITIES for WRMSR checks > > arch/x86/events/intel/lbr.c | 6 +--- > arch/x86/include/asm/perf_event.h | 6 ++-- > arch/x86/kvm/svm/svm.c | 3 +- > arch/x86/kvm/vmx/capabilities.h | 37 ---------------------- > arch/x86/kvm/vmx/pmu_intel.c | 1 - > arch/x86/kvm/vmx/vmx.c | 51 +++++++++++++++++++++++-------- > arch/x86/kvm/x86.c | 14 ++++----- > arch/x86/kvm/x86.h | 1 + > 8 files changed, 52 insertions(+), 67 deletions(-) > > > base-commit: e18d6152ff0f41b7f01f9817372022df04e0d354 Queued, with patches 2-4 destined to kvm/master. Paolo