From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A0609291157; Fri, 9 May 2025 12:56:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746795382; cv=none; b=TJ5qHZ955toVvEbr3JNjHAmKVvjghiWQVPbu2eg88J1TY3hvFx3WhXUb2crXue1jHiNgcPgj8bG2UpJHCXIbrwAslumjCvtbLzYSRWIl5+QuM+dQs3JF2Cg061saW7alBE0rtETcGId8FMdIJzITq9r92xEMZAJ5MOkHxi0Zokw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746795382; c=relaxed/simple; bh=kENEwiubITe2MKY6fiVD4dUfKgaM/qvrW81svErkk3g=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=Gjmj+IityCuGXrqVOZvi4JSBCg42QySsI51p7kzCbsKN1rzEYGjCwfOvYrdiCEBS85OoGt+vVHvUzRKrXcMmQFHeMbxN3tjHHgxerLvaYd8EhKBTE/yXJNiihBL2aCwrVv9vlSFHoU6ctWm+XWZPoc9RcOnraZ97QO54p2w81Hg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 97DFF175D; Fri, 9 May 2025 05:56:07 -0700 (PDT) Received: from J2N7QTR9R3 (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 1EF403F58B; Fri, 9 May 2025 05:56:05 -0700 (PDT) Date: Fri, 9 May 2025 13:56:01 +0100 From: Mark Rutland To: Ian Rogers Cc: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Alexander Shishkin , Jiri Olsa , Adrian Hunter , Kan Liang , Yury Norov , Rasmus Villemoes , Thomas Gleixner , Darren Hart , Davidlohr Bueso , =?utf-8?B?QW5kcsOp?= Almeida , John Garry , Will Deacon , James Clark , Mike Leach , Leo Yan , Yicong Yang , Jonathan Cameron , Nathan Chancellor , Bill Wendling , Justin Stitt , Josh Poimboeuf , Al Viro , Kyle Meyer , Ben Gainey , Athira Rajeev , Kajol Jain , Aditya Gupta , Eder Zulian , Dapeng Mi , Kuan-Wei Chiu , He Zhe , Dirk Gouders , Brian Geffon , Ravi Bangoria , Howard Chu , Charlie Jenkins , Colin Ian King , Dominique Martinet , Jann Horn , Masahiro Yamada , Arnd Bergmann , Yang Jihong , Dmitry Vyukov , Andi Kleen , Graham Woodward , Ilkka Koskinen , Anshuman Khandual , Zhongqiu Han , Hao Ge , Tengda Wu , Gabriele Monaco , Chun-Tse Shao , Casey Chen , "Dr. David Alan Gilbert" , Li Huafei , "Steinar H. Gunderson" , Levi Yun , Weilin Wang , Thomas Falcon , Thomas Richter , Andrew Kreimer , Krzysztof =?utf-8?Q?=C5=81opatowski?= , Christophe Leroy , Jean-Philippe Romain , Junhao He , "Masami Hiramatsu (Google)" , Xu Yang , Steve Clevenger , Zixian Cai , Stephen Brennan , Yujie Liu , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org, llvm@lists.linux.dev Subject: Re: [PATCH v2 05/47] arm64: cputype: Silence -Wshorten-64-to-32 warnings Message-ID: References: <20250430175036.184610-1-irogers@google.com> <20250430175036.184610-6-irogers@google.com> Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250430175036.184610-6-irogers@google.com> On Wed, Apr 30, 2025 at 10:49:53AM -0700, Ian Rogers wrote: > The clang warning -Wshorten-64-to-32 can be useful to catch > inadvertent truncation. In some instances this truncation can lead to > changing the sign of a result, for example, truncation to return an > int to fit a sort routine. Silence the warning by making the implicit > truncation explicit. > > Signed-off-by: Ian Rogers > --- > tools/arch/arm64/include/asm/cputype.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/tools/arch/arm64/include/asm/cputype.h b/tools/arch/arm64/include/asm/cputype.h > index 488f8e751349..d7289b9d2758 100644 > --- a/tools/arch/arm64/include/asm/cputype.h > +++ b/tools/arch/arm64/include/asm/cputype.h > @@ -227,7 +227,7 @@ > > #include > > -#define read_cpuid(reg) read_sysreg_s(SYS_ ## reg) > +#define read_cpuid(reg) ((u32)read_sysreg_s(SYS_ ## reg)) This isn't right. Architecturally, system registers are 64-bit wide, and some of the ID registers have allocated fields in the upper 32 bits, e.g. in MPIDR, where we this will silently discard those when accessed via read_cpuid_mpidr(): static inline u64 __attribute_const__ read_cpuid_mpidr(void) { return read_cpuid(MPIDR_EL1); } Mark.