From: Ingo Molnar <mingo@kernel.org>
To: "Xin Li (Intel)" <xin@zytor.com>
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
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alexander.shishkin@linux.intel.com, jolsa@kernel.org,
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kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com,
dapeng1.mi@linux.intel.com, ilpo.jarvinen@linux.intel.com
Subject: Re: [PATCH v4 02/15] x86/msr: Move rdtsc{,_ordered}() to <asm/tsc.h>
Date: Fri, 2 May 2025 10:18:30 +0200 [thread overview]
Message-ID: <aBR_1oQN-gKCREBD@gmail.com> (raw)
In-Reply-To: <20250427092027.1598740-3-xin@zytor.com>
* Xin Li (Intel) <xin@zytor.com> wrote:
> For some reason, there are some TSC-related functions in the MSR
^^^^^^^^^^^^^^^
> header even though there is a tsc.h header.
The real reason is that the rdtsc{,_ordered}() methods use the
EAX_EDX_*() macros to optimize their EDX/EAX assembly accessors, which
is why these methods were in <asm/msr.h>.
Your followup patch tacitly acknowledges this by silently creating
duplicate copies of these facilities in both headers ...
I've cleaned it all up in tip:x86/msr via these preparatory patches:
x86/msr: Improve the comments of the DECLARE_ARGS()/EAX_EDX_VAL()/EAX_EDX_RET() facility
x86/msr: Rename DECLARE_ARGS() to EAX_EDX_DECLARE_ARGS
x86/msr: Move the EAX_EDX_*() methods from <asm/msr.h> to <asm/asm.h>
Thanks,
Ingo
next prev parent reply other threads:[~2025-05-02 8:18 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-27 9:20 [PATCH v4 00/15] MSR code cleanup part one Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 01/15] x86/msr: Add missing includes of <asm/msr.h> Xin Li (Intel)
2025-04-29 9:45 ` Ilpo Järvinen
2025-04-29 17:27 ` Xin Li
2025-04-30 4:20 ` Michael Kelley
2025-04-30 9:12 ` Xin Li
2025-04-30 8:41 ` Xin Li
2025-04-30 9:17 ` Ilpo Järvinen
2025-04-30 17:34 ` Xin Li
2025-05-01 5:42 ` [PATCH v4A " Xin Li (Intel)
2025-05-02 13:13 ` Ilpo Järvinen
2025-05-02 17:50 ` Xin Li
2025-04-27 9:20 ` [PATCH v4 02/15] x86/msr: Move rdtsc{,_ordered}() to <asm/tsc.h> Xin Li (Intel)
2025-05-02 8:02 ` Ingo Molnar
2025-05-02 18:09 ` Xin Li
2025-05-02 8:18 ` Ingo Molnar [this message]
2025-05-02 18:01 ` Xin Li
2025-05-02 8:52 ` Ingo Molnar
2025-05-02 18:00 ` Xin Li
2025-04-27 9:20 ` [PATCH v4 03/15] x86/msr: Remove rdpmc() Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 04/15] x86/msr: Rename rdpmcl() to rdpmc() Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 05/15] x86/msr: Convert the rdpmc() macro into an always inline function Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 06/15] x86/xen/msr: Return u64 consistently in Xen PMC read functions Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 07/15] x86/msr: Convert __wrmsr() uses to native_wrmsr{,q}() uses Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 08/15] x86/msr: Add the native_rdmsrq() helper Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 09/15] x86/msr: Convert __rdmsr() uses to native_rdmsrq() uses Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 10/15] x86/xen/msr: Remove calling native_{read,write}_msr{,_safe}() in pmu_msr_{read,write}() Xin Li (Intel)
2025-05-02 8:30 ` Ingo Molnar
2025-04-27 9:20 ` [PATCH v4 11/15] x86/xen/msr: Remove pmu_msr_{read,write}() Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 12/15] x86/xen/msr: Remove the error pointer argument from set_seg() Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 13/15] x86/pvops/msr: refactor pv_cpu_ops.write_msr{,_safe}() Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 14/15] x86/msr: Replace wrmsr(msr, low, 0) with wrmsrq(msr, low) Xin Li (Intel)
2025-04-27 9:20 ` [PATCH v4 15/15] x86/msr: Change the function type of native_read_msr_safe() Xin Li (Intel)
2025-05-02 14:13 ` [PATCH v4 00/15] MSR code cleanup part one Michael Kelley
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