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From: Andi Kleen <ak@linux.intel.com>
To: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Namhyung Kim <namhyung@kernel.org>,
	Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Kan Liang <kan.liang@linux.intel.com>,
	Eranian Stephane <eranian@google.com>,
	linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
	Dapeng Mi <dapeng1.mi@intel.com>,
	kernel test robot <oliver.sang@intel.com>
Subject: Re: [Patch v3 3/7] perf/x86: Check if cpuc->events[*] pointer exists before accessing it
Date: Wed, 20 Aug 2025 18:51:30 -0700	[thread overview]
Message-ID: <aKZ7omM0-3i72hfr@tassilo> (raw)
In-Reply-To: <fab2a035-5ab3-4e24-bd3e-760a4b9be5e8@linux.intel.com>

On Wed, Aug 20, 2025 at 01:54:17PM +0800, Mi, Dapeng wrote:
> 
> On 8/20/2025 1:44 PM, Andi Kleen wrote:
> >> Andi, I didn't fully get the exact meaning about the "log" here. When
> >> throttle is triggered, perf_event_throttle() has already called
> >> perf_log_throttle() to log the throttle event although only for the group
> >> leader. Is it enough?
> > Throttle normally doesn't involve data loss, just less samples. But this
> > is data loss, so it's an overflow.
> 
> IIUC, there should be no data loss, the unprocessed PEBS records of these
> throttled events would be still processed eventually by calling
> intel_pmu_drain_pebs_buffer() when stopping the event.

Makes sense. Thanks,
-Andi

  reply	other threads:[~2025-08-21  1:51 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-20  2:30 [Patch v3 0/7] x86 perf bug fixes and optimization Dapeng Mi
2025-08-20  2:30 ` [Patch v3 1/7] perf/x86/intel: Use early_initcall() to hook bts_init() Dapeng Mi
2025-08-20  2:30 ` [Patch v3 2/7] perf/x86/intel: Fix IA32_PMC_x_CFG_B MSRs access error Dapeng Mi
2025-08-20  2:30 ` [Patch v3 3/7] perf/x86: Check if cpuc->events[*] pointer exists before accessing it Dapeng Mi
2025-08-20  3:41   ` Andi Kleen
2025-08-20  5:33     ` Mi, Dapeng
2025-08-20  5:44       ` Andi Kleen
2025-08-20  5:54         ` Mi, Dapeng
2025-08-21  1:51           ` Andi Kleen [this message]
2025-08-21 13:35   ` Peter Zijlstra
2025-08-22  5:26     ` Mi, Dapeng
2025-08-26  3:47       ` Mi, Dapeng
2025-08-20  2:30 ` [Patch v3 4/7] perf/x86: Add PERF_CAP_PEBS_TIMING_INFO flag Dapeng Mi
2025-08-20  2:30 ` [Patch v3 5/7] perf/x86/intel: Change macro GLOBAL_CTRL_EN_PERF_METRICS to BIT_ULL(48) Dapeng Mi
2025-08-20  2:30 ` [Patch v3 6/7] perf/x86/intel: Add ICL_FIXED_0_ADAPTIVE bit into INTEL_FIXED_BITS_MASK Dapeng Mi
2025-08-20  2:30 ` [Patch v3 7/7] perf/x86: Print PMU counters bitmap in x86_pmu_show_pmu_cap() Dapeng Mi
2025-08-20 15:55 ` [Patch v3 0/7] x86 perf bug fixes and optimization Liang, Kan
2025-08-21 13:39   ` Peter Zijlstra
2025-08-22  5:29     ` Mi, Dapeng

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